Commit 266152ae authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: s/intel/hsw/ for hsw/bdw/skl buf trans

Give the hsw/bdw/skl buf trans stuff a better namespace.
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-2-ville.syrjala@linux.intel.com
parent 17203224
......@@ -95,24 +95,21 @@ static int intel_ddi_hdmi_level(struct intel_encoder *encoder,
* values in advance. This function programs the correct values for
* DP/eDP/FDI use cases.
*/
void intel_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
u32 iboost_bit = 0;
int i, n_entries;
enum port port = encoder->port;
const struct ddi_buf_trans *ddi_translations;
const struct hsw_ddi_buf_trans *ddi_translations;
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG))
ddi_translations = intel_ddi_get_buf_trans_fdi(dev_priv,
&n_entries);
ddi_translations = hsw_ddi_get_buf_trans_fdi(dev_priv, &n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
ddi_translations = intel_ddi_get_buf_trans_edp(encoder,
&n_entries);
ddi_translations = hsw_ddi_get_buf_trans_edp(encoder, &n_entries);
else
ddi_translations = intel_ddi_get_buf_trans_dp(encoder,
&n_entries);
ddi_translations = hsw_ddi_get_buf_trans_dp(encoder, &n_entries);
/* If we're boosting the current, set bit 31 of trans1 */
if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv) &&
......@@ -132,16 +129,16 @@ void intel_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
* values in advance. This function programs the correct values for
* HDMI/DVI use cases.
*/
static void intel_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
int level)
static void hsw_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
int level)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
u32 iboost_bit = 0;
int n_entries;
enum port port = encoder->port;
const struct ddi_buf_trans *ddi_translations;
const struct hsw_ddi_buf_trans *ddi_translations;
ddi_translations = intel_ddi_get_buf_trans_hdmi(encoder, &n_entries);
ddi_translations = hsw_ddi_get_buf_trans_hdmi(encoder, &n_entries);
if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
return;
......@@ -948,15 +945,15 @@ static void skl_ddi_set_iboost(struct intel_encoder *encoder,
iboost = intel_bios_encoder_dp_boost_level(encoder->devdata);
if (iboost == 0) {
const struct ddi_buf_trans *ddi_translations;
const struct hsw_ddi_buf_trans *ddi_translations;
int n_entries;
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
ddi_translations = intel_ddi_get_buf_trans_hdmi(encoder, &n_entries);
ddi_translations = hsw_ddi_get_buf_trans_hdmi(encoder, &n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
ddi_translations = intel_ddi_get_buf_trans_edp(encoder, &n_entries);
ddi_translations = hsw_ddi_get_buf_trans_edp(encoder, &n_entries);
else
ddi_translations = intel_ddi_get_buf_trans_dp(encoder, &n_entries);
ddi_translations = hsw_ddi_get_buf_trans_dp(encoder, &n_entries);
if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
return;
......@@ -1031,9 +1028,9 @@ static u8 intel_ddi_dp_voltage_max(struct intel_dp *intel_dp,
bxt_get_buf_trans(encoder, crtc_state, &n_entries);
} else {
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
intel_ddi_get_buf_trans_edp(encoder, &n_entries);
hsw_ddi_get_buf_trans_edp(encoder, &n_entries);
else
intel_ddi_get_buf_trans_dp(encoder, &n_entries);
hsw_ddi_get_buf_trans_dp(encoder, &n_entries);
}
if (drm_WARN_ON(&dev_priv->drm, n_entries < 1))
......@@ -2702,7 +2699,7 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
bxt_ddi_vswing_sequence(encoder, crtc_state, level);
else
intel_prepare_dp_ddi_buffers(encoder, crtc_state);
hsw_prepare_dp_ddi_buffers(encoder, crtc_state);
intel_ddi_power_up_lanes(encoder, crtc_state);
......@@ -3150,7 +3147,7 @@ static void intel_enable_ddi_hdmi(struct intel_atomic_state *state,
else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
bxt_ddi_vswing_sequence(encoder, crtc_state, level);
else
intel_prepare_hdmi_ddi_buffers(encoder, level);
hsw_prepare_hdmi_ddi_buffers(encoder, level);
if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv))
skl_ddi_set_iboost(encoder, crtc_state, level);
......
......@@ -40,8 +40,8 @@ bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder);
void hsw_ddi_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state);
struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
void intel_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
enum port port);
void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
......
......@@ -12,7 +12,7 @@ struct drm_i915_private;
struct intel_encoder;
struct intel_crtc_state;
struct ddi_buf_trans {
struct hsw_ddi_buf_trans {
u32 trans1; /* balance leg enable, de-emph level */
u32 trans2; /* vref sel, vswing */
u8 i_boost; /* SKL: I_boost; valid: 0x0, 0x1, 0x3, 0x7 */
......@@ -51,16 +51,14 @@ int intel_ddi_hdmi_num_entries(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *default_entry);
const struct ddi_buf_trans *
intel_ddi_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries);
const struct ddi_buf_trans *
intel_ddi_get_buf_trans_fdi(struct drm_i915_private *dev_priv,
int *n_entries);
const struct ddi_buf_trans *
intel_ddi_get_buf_trans_hdmi(struct intel_encoder *encoder,
int *n_entries);
const struct ddi_buf_trans *
intel_ddi_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries);
const struct hsw_ddi_buf_trans *
hsw_ddi_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries);
const struct hsw_ddi_buf_trans *
hsw_ddi_get_buf_trans_fdi(struct drm_i915_private *dev_priv, int *n_entries);
const struct hsw_ddi_buf_trans *
hsw_ddi_get_buf_trans_hdmi(struct intel_encoder *encoder, int *n_entries);
const struct hsw_ddi_buf_trans *
hsw_ddi_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries);
const struct bxt_ddi_buf_trans *
bxt_get_buf_trans(struct intel_encoder *encoder,
......
......@@ -569,9 +569,9 @@ void hsw_fdi_link_train(struct intel_encoder *encoder,
u32 temp, i, rx_ctl_val;
int n_entries;
intel_ddi_get_buf_trans_fdi(dev_priv, &n_entries);
hsw_ddi_get_buf_trans_fdi(dev_priv, &n_entries);
intel_prepare_dp_ddi_buffers(encoder, crtc_state);
hsw_prepare_dp_ddi_buffers(encoder, crtc_state);
/* Set the FDI_RX_MISC pwrdn lanes and the 2 workarounds listed at the
* mode set "sequence for CRT port" document:
......
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