Commit 26bcc8f7 authored by John Lenz's avatar John Lenz Committed by Russell King

[ARM PATCH] 1938/1: Support for Collie device

Patch from John Lenz

Cleanup and forward port of patch 1850.
Add machine support for the Sharp Zaurus SL5500 PDA.
Does not include support for the collie serial port or
the sa1100fb_lcd_power function.
parent 93ab63ad
...@@ -30,6 +30,9 @@ __SA1100_start: ...@@ -30,6 +30,9 @@ __SA1100_start:
mov r8, #0 mov r8, #0
#endif #endif
#ifdef CONFIG_SA1100_COLLIE
mov r7, #MACH_TYPE_COLLIE
#endif
#ifdef CONFIG_SA1100_PFS168 #ifdef CONFIG_SA1100_PFS168
@ REVISIT_PFS168: Temporary until firmware updated to use assigned machine number @ REVISIT_PFS168: Temporary until firmware updated to use assigned machine number
mov r7, #MACH_TYPE_PFS168 mov r7, #MACH_TYPE_PFS168
......
...@@ -57,6 +57,12 @@ config SA1100_CERF_FLASH_32MB ...@@ -57,6 +57,12 @@ config SA1100_CERF_FLASH_32MB
endchoice endchoice
config SA1100_COLLIE
bool "Sharp Zaurus SL5500"
depends on ARCH_SA1100
help
Say Y here to support the Sharp Zaurus SL5500 PDAs.
config SA1100_H3100 config SA1100_H3100
bool "Compaq iPAQ H3100" bool "Compaq iPAQ H3100"
help help
......
...@@ -29,6 +29,8 @@ led-$(CONFIG_SA1100_BRUTUS) += leds-brutus.o ...@@ -29,6 +29,8 @@ led-$(CONFIG_SA1100_BRUTUS) += leds-brutus.o
obj-$(CONFIG_SA1100_CERF) += cerf.o obj-$(CONFIG_SA1100_CERF) += cerf.o
led-$(CONFIG_SA1100_CERF) += leds-cerf.o led-$(CONFIG_SA1100_CERF) += leds-cerf.o
obj-$(CONFIG_SA1100_COLLIE) += collie.o
obj-$(CONFIG_SA1100_EMPEG) += empeg.o obj-$(CONFIG_SA1100_EMPEG) += empeg.o
obj-$(CONFIG_SA1100_FLEXANET) += flexanet.o obj-$(CONFIG_SA1100_FLEXANET) += flexanet.o
......
/*
* linux/arch/arm/mach-sa1100/collie.c
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* This file contains all Collie-specific tweaks.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* ChangeLog:
* 03-06-2004 John Lenz <jelenz@wisc.edu>
* 06-04-2002 Chris Larson <kergoth@digitalnemesis.net>
* 04-16-2001 Lineo Japan,Inc. ...
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/tty.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/timer.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/arch/collie.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/serial_sa1100.h>
#include <asm/hardware/locomo.h>
#include "generic.h"
static void __init scoop_init(void)
{
#define COLLIE_SCP_INIT_DATA(adr,dat) (((adr)<<16)|(dat))
#define COLLIE_SCP_INIT_DATA_END ((unsigned long)-1)
static const unsigned long scp_init[] = {
COLLIE_SCP_INIT_DATA(COLLIE_SCP_MCR, 0x0140), // 00
COLLIE_SCP_INIT_DATA(COLLIE_SCP_MCR, 0x0100),
COLLIE_SCP_INIT_DATA(COLLIE_SCP_CDR, 0x0000), // 04
COLLIE_SCP_INIT_DATA(COLLIE_SCP_CPR, 0x0000), // 0C
COLLIE_SCP_INIT_DATA(COLLIE_SCP_CCR, 0x0000), // 10
COLLIE_SCP_INIT_DATA(COLLIE_SCP_IMR, 0x0000), // 18
COLLIE_SCP_INIT_DATA(COLLIE_SCP_IRM, 0x00FF), // 14
COLLIE_SCP_INIT_DATA(COLLIE_SCP_ISR, 0x0000), // 1C
COLLIE_SCP_INIT_DATA(COLLIE_SCP_IRM, 0x0000),
COLLIE_SCP_INIT_DATA(COLLIE_SCP_GPCR, COLLIE_SCP_IO_DIR), // 20
COLLIE_SCP_INIT_DATA(COLLIE_SCP_GPWR, COLLIE_SCP_IO_OUT), // 24
COLLIE_SCP_INIT_DATA_END
};
int i;
for (i = 0; scp_init[i] != COLLIE_SCP_INIT_DATA_END; i++) {
int adr = scp_init[i] >> 16;
COLLIE_SCP_REG(adr) = scp_init[i] & 0xFFFF;
}
}
static struct resource locomo_resources[] = {
[0] = {
.start = 0x40000000,
.end = 0x40001fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_GPIO25,
.end = IRQ_GPIO25,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device locomo_device = {
.name = "locomo",
.id = 0,
.num_resources = ARRAY_SIZE(locomo_resources),
.resource = locomo_resources,
};
static struct platform_device *devices[] __initdata = {
&locomo_device,
};
static int __init collie_init(void)
{
int ret = 0;
/* cpu initialize */
GAFR = ( GPIO_SSP_TXD | \
GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SSP_CLK | GPIO_TIC_ACK | \
GPIO_32_768kHz );
GPDR = ( GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 | \
GPIO_LDD13 | GPIO_LDD14 | GPIO_LDD15 | GPIO_SSP_TXD | \
GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SDLC_SCLK | \
GPIO_SDLC_AAF | GPIO_UART_SCLK1 | GPIO_32_768kHz );
GPLR = GPIO_GPIO18;
// PPC pin setting
PPDR = ( PPC_LDD0 | PPC_LDD1 | PPC_LDD2 | PPC_LDD3 | PPC_LDD4 | PPC_LDD5 | \
PPC_LDD6 | PPC_LDD7 | PPC_L_PCLK | PPC_L_LCLK | PPC_L_FCLK | PPC_L_BIAS | \
PPC_TXD1 | PPC_TXD2 | PPC_RXD2 | PPC_TXD3 | PPC_TXD4 | PPC_SCLK | PPC_SFRM );
PSDR = ( PPC_RXD1 | PPC_RXD2 | PPC_RXD3 | PPC_RXD4 );
GAFR |= GPIO_32_768kHz;
GPDR |= GPIO_32_768kHz;
TUCR = TUCR_32_768kHz;
scoop_init();
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
if (ret) {
printk(KERN_WARNING "collie: Unable to register LoCoMo device\n");
return ret;
}
return ret;
}
arch_initcall(collie_init);
static struct map_desc collie_io_desc[] __initdata = {
/* virtual physical length type */
{0xe8000000, 0x00000000, 0x02000000, MT_DEVICE}, /* 32M main flash (cs0) */
{0xea000000, 0x08000000, 0x02000000, MT_DEVICE}, /* 32M boot flash (cs1) */
{0xf0000000, 0x40000000, 0x01000000, MT_DEVICE}, /* 16M LOCOMO & SCOOP (cs4) */
};
static void __init collie_map_io(void)
{
sa1100_map_io();
iotable_init(collie_io_desc, ARRAY_SIZE(collie_io_desc));
}
MACHINE_START(COLLIE, "Sharp-Collie")
BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
MAPIO(collie_map_io)
INITIRQ(sa1100_init_irq)
MACHINE_END
/*
* linux/include/asm-arm/arch-sa1100/collie.h
*
* This file contains the hardware specific definitions for Assabet
* Only include this file from SA1100-specific files.
*
* ChangeLog:
* 04-06-2001 Lineo Japan, Inc.
* 04-16-2001 SHARP Corporation
* 07-07-2002 Chris Larson <clarson@digi.com>
*
*/
#ifndef __ASM_ARCH_COLLIE_H
#define __ASM_ARCH_COLLIE_H
#include <linux/config.h>
#define CF_BUF_CTRL_BASE 0xF0800000
#define COLLIE_SCP_REG(adr) (*(volatile unsigned short*)(CF_BUF_CTRL_BASE+(adr)))
#define COLLIE_SCP_MCR 0x00
#define COLLIE_SCP_CDR 0x04
#define COLLIE_SCP_CSR 0x08
#define COLLIE_SCP_CPR 0x0C
#define COLLIE_SCP_CCR 0x10
#define COLLIE_SCP_IRR 0x14
#define COLLIE_SCP_IRM 0x14
#define COLLIE_SCP_IMR 0x18
#define COLLIE_SCP_ISR 0x1C
#define COLLIE_SCP_GPCR 0x20
#define COLLIE_SCP_GPWR 0x24
#define COLLIE_SCP_GPRR 0x28
#define COLLIE_SCP_REG_MCR COLLIE_SCP_REG(COLLIE_SCP_MCR)
#define COLLIE_SCP_REG_CDR COLLIE_SCP_REG(COLLIE_SCP_CDR)
#define COLLIE_SCP_REG_CSR COLLIE_SCP_REG(COLLIE_SCP_CSR)
#define COLLIE_SCP_REG_CPR COLLIE_SCP_REG(COLLIE_SCP_CPR)
#define COLLIE_SCP_REG_CCR COLLIE_SCP_REG(COLLIE_SCP_CCR)
#define COLLIE_SCP_REG_IRR COLLIE_SCP_REG(COLLIE_SCP_IRR)
#define COLLIE_SCP_REG_IRM COLLIE_SCP_REG(COLLIE_SCP_IRM)
#define COLLIE_SCP_REG_IMR COLLIE_SCP_REG(COLLIE_SCP_IMR)
#define COLLIE_SCP_REG_ISR COLLIE_SCP_REG(COLLIE_SCP_ISR)
#define COLLIE_SCP_REG_GPCR COLLIE_SCP_REG(COLLIE_SCP_GPCR)
#define COLLIE_SCP_REG_GPWR COLLIE_SCP_REG(COLLIE_SCP_GPWR)
#define COLLIE_SCP_REG_GPRR COLLIE_SCP_REG(COLLIE_SCP_GPRR)
#define COLLIE_SCP_GPCR_PA19 ( 1 << 9 )
#define COLLIE_SCP_GPCR_PA18 ( 1 << 8 )
#define COLLIE_SCP_GPCR_PA17 ( 1 << 7 )
#define COLLIE_SCP_GPCR_PA16 ( 1 << 6 )
#define COLLIE_SCP_GPCR_PA15 ( 1 << 5 )
#define COLLIE_SCP_GPCR_PA14 ( 1 << 4 )
#define COLLIE_SCP_GPCR_PA13 ( 1 << 3 )
#define COLLIE_SCP_GPCR_PA12 ( 1 << 2 )
#define COLLIE_SCP_GPCR_PA11 ( 1 << 1 )
#define COLLIE_SCP_CHARGE_ON COLLIE_SCP_GPCR_PA11
#define COLLIE_SCP_DIAG_BOOT1 COLLIE_SCP_GPCR_PA12
#define COLLIE_SCP_DIAG_BOOT2 COLLIE_SCP_GPCR_PA13
#define COLLIE_SCP_MUTE_L COLLIE_SCP_GPCR_PA14
#define COLLIE_SCP_MUTE_R COLLIE_SCP_GPCR_PA15
#define COLLIE_SCP_5VON COLLIE_SCP_GPCR_PA16
#define COLLIE_SCP_AMP_ON COLLIE_SCP_GPCR_PA17
#define COLLIE_SCP_VPEN COLLIE_SCP_GPCR_PA18
#define COLLIE_SCP_LB_VOL_CHG COLLIE_SCP_GPCR_PA19
#define COLLIE_SCP_IO_DIR ( COLLIE_SCP_CHARGE_ON | COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | \
COLLIE_SCP_5VON | COLLIE_SCP_AMP_ON | COLLIE_SCP_VPEN | \
COLLIE_SCP_LB_VOL_CHG )
#define COLLIE_SCP_IO_OUT ( COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | COLLIE_SCP_VPEN | \
COLLIE_SCP_CHARGE_ON )
/* GPIOs for which the generic definition doesn't say much */
#define COLLIE_GPIO_ON_KEY GPIO_GPIO (0)
#define COLLIE_GPIO_AC_IN GPIO_GPIO (1)
#define COLLIE_GPIO_CF_IRQ GPIO_GPIO (14)
#define COLLIE_GPIO_nREMOCON_INT GPIO_GPIO (15)
#define COLLIE_GPIO_UCB1x00_RESET GPIO_GPIO (16)
#define COLLIE_GPIO_CO GPIO_GPIO (20)
#define COLLIE_GPIO_MCP_CLK GPIO_GPIO (21)
#define COLLIE_GPIO_CF_CD GPIO_GPIO (22)
#define COLLIE_GPIO_UCB1x00_IRQ GPIO_GPIO (23)
#define COLLIE_GPIO_WAKEUP GPIO_GPIO (24)
#define COLLIE_GPIO_GA_INT GPIO_GPIO (25)
#define COLLIE_GPIO_MAIN_BAT_LOW GPIO_GPIO (26)
/* Interrupts */
#define COLLIE_IRQ_GPIO_ON_KEY IRQ_GPIO0
#define COLLIE_IRQ_GPIO_AC_IN IRQ_GPIO1
#define COLLIE_IRQ_GPIO_CF_IRQ IRQ_GPIO14
#define COLLIE_IRQ_GPIO_nREMOCON_INT IRQ_GPIO15
#define COLLIE_IRQ_GPIO_CO IRQ_GPIO20
#define COLLIE_IRQ_GPIO_CF_CD IRQ_GPIO22
#define COLLIE_IRQ_GPIO_UCB1x00_IRQ IRQ_GPIO23
#define COLLIE_IRQ_GPIO_WAKEUP IRQ_GPIO24
#define COLLIE_IRQ_GPIO_GA_INT IRQ_GPIO25
#define COLLIE_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO26
#define COLLIE_LCM_IRQ_GPIO_RTS IRQ_LOCOMO_GPIO0
#define COLLIE_LCM_IRQ_GPIO_CTS IRQ_LOCOMO_GPIO1
#define COLLIE_LCM_IRQ_GPIO_DSR IRQ_LOCOMO_GPIO2
#define COLLIE_LCM_IRQ_GPIO_DTR IRQ_LOCOMO_GPIO3
#define COLLIE_LCM_IRQ_GPIO_nSD_DETECT IRQ_LOCOMO_GPIO13
#define COLLIE_LCM_IRQ_GPIO_nSD_WP IRQ_LOCOMO_GPIO14
/*
* Flash Memory mappings
*
*/
#define FLASH_MEM_BASE 0xe8ffc000
#define FLASH_DATA(adr) (*(volatile unsigned int*)(FLASH_MEM_BASE+(adr)))
#define FLASH_DATA_F(adr) (*(volatile float32 *)(FLASH_MEM_BASE+(adr)))
#define FLASH_MAGIC_CHG(a,b,c,d) ( ( d << 24 ) | ( c << 16 ) | ( b << 8 ) | a )
// COMADJ
#define FLASH_COMADJ_MAJIC FLASH_MAGIC_CHG('C','M','A','D')
#define FLASH_COMADJ_MAGIC_ADR 0x00
#define FLASH_COMADJ_DATA_ADR 0x04
// TOUCH PANEL
#define FLASH_TOUCH_MAJIC FLASH_MAGIC_CHG('T','U','C','H')
#define FLASH_TOUCH_MAGIC_ADR 0x1C
#define FLASH_TOUCH_XP_DATA_ADR 0x20
#define FLASH_TOUCH_YP_DATA_ADR 0x24
#define FLASH_TOUCH_XD_DATA_ADR 0x28
#define FLASH_TOUCH_YD_DATA_ADR 0x2C
// AD
#define FLASH_AD_MAJIC FLASH_MAGIC_CHG('B','V','A','D')
#define FLASH_AD_MAGIC_ADR 0x30
#define FLASH_AD_DATA_ADR 0x34
/* GPIO's on the TC35143AF (Toshiba Analog Frontend) */
#define COLLIE_TC35143_GPIO_VERSION0 UCB_IO_0 /* GPIO0=Version */
#define COLLIE_TC35143_GPIO_TBL_CHK UCB_IO_1 /* GPIO1=TBL_CHK */
#define COLLIE_TC35143_GPIO_VPEN_ON UCB_IO_2 /* GPIO2=VPNE_ON */
#define COLLIE_TC35143_GPIO_IR_ON UCB_IO_3 /* GPIO3=IR_ON */
#define COLLIE_TC35143_GPIO_AMP_ON UCB_IO_4 /* GPIO4=AMP_ON */
#define COLLIE_TC35143_GPIO_VERSION1 UCB_IO_5 /* GPIO5=Version */
#define COLLIE_TC35143_GPIO_FS8KLPF UCB_IO_5 /* GPIO5=fs 8k LPF */
#define COLLIE_TC35143_GPIO_BUZZER_BIAS UCB_IO_6 /* GPIO6=BUZZER BIAS */
#define COLLIE_TC35143_GPIO_MBAT_ON UCB_IO_7 /* GPIO7=MBAT_ON */
#define COLLIE_TC35143_GPIO_BBAT_ON UCB_IO_8 /* GPIO8=BBAT_ON */
#define COLLIE_TC35143_GPIO_TMP_ON UCB_IO_9 /* GPIO9=TMP_ON */
#define COLLIE_TC35143_GPIO_IN ( UCB_IO_0 | UCB_IO_2 | UCB_IO_5 )
#define COLLIE_TC35143_GPIO_OUT ( UCB_IO_1 | UCB_IO_3 | UCB_IO_4 | UCB_IO_6 | \
UCB_IO_7 | UCB_IO_8 | UCB_IO_9 )
#endif
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