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Commit 27510721 authored by Russell King's avatar Russell King
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[ARM] set_pgd is confusing; rename it switch_mm 

set_pgd implies that we're setting a pgd entry.  We aren't; we're
switching the MMU page table pointer.  Call it switch_mm instead.
parent ef76bbd2
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Showing with 44 additions and 42 deletions
arch/arm/mm/proc-arm1020.S
View file @ 27510721
...@@ -335,14 +335,14 @@ ENTRY(cpu_arm1020_dcache_clean_area) ...@@ -335,14 +335,14 @@ ENTRY(cpu_arm1020_dcache_clean_area)
/* =============================== PageTable ============================== */ /* =============================== PageTable ============================== */
/* /*
* cpu_arm1020_set_pgd(pgd) * cpu_arm1020_switch_mm(pgd)
* *
* Set the translation base pointer to be as described by pgd. * Set the translation base pointer to be as described by pgd.
* *
* pgd: new page tables * pgd: new page tables
*/ */
.align 5 .align 5
ENTRY(cpu_arm1020_set_pgd) ENTRY(cpu_arm1020_switch_mm)
#ifndef CONFIG_CPU_DCACHE_DISABLE #ifndef CONFIG_CPU_DCACHE_DISABLE
mcr p15, 0, r3, c7, c10, 4 mcr p15, 0, r3, c7, c10, 4
mov r1, #0xF @ 16 segments mov r1, #0xF @ 16 segments
...@@ -482,7 +482,7 @@ arm1020_processor_functions: ...@@ -482,7 +482,7 @@ arm1020_processor_functions:
.word cpu_arm1020_reset .word cpu_arm1020_reset
.word cpu_arm1020_do_idle .word cpu_arm1020_do_idle
.word cpu_arm1020_dcache_clean_area .word cpu_arm1020_dcache_clean_area
.word cpu_arm1020_set_pgd .word cpu_arm1020_switch_mm
.word cpu_arm1020_set_pte .word cpu_arm1020_set_pte
.size arm1020_processor_functions, . - arm1020_processor_functions .size arm1020_processor_functions, . - arm1020_processor_functions
......
arch/arm/mm/proc-arm2_3.S
View file @ 27510721
...@@ -162,7 +162,7 @@ memc_phys_table_32: ...@@ -162,7 +162,7 @@ memc_phys_table_32:
* and inaccessible (0x01f00000). * and inaccessible (0x01f00000).
* Params : r0 = page table pointer * Params : r0 = page table pointer
*/ */
clear_tables: ldr r1, _arm3_set_pgd - 4 clear_tables: ldr r1, _arm3_switch_mm - 4
ldr r2, [r1] ldr r2, [r1]
sub r1, r0, #256 * 4 @ start of MEMC tables sub r1, r0, #256 * 4 @ start of MEMC tables
add r2, r1, r2, lsl #2 @ end of tables add r2, r1, r2, lsl #2 @ end of tables
...@@ -186,14 +186,16 @@ clear_tables: ldr r1, _arm3_set_pgd - 4 ...@@ -186,14 +186,16 @@ clear_tables: ldr r1, _arm3_set_pgd - 4
mov pc, lr mov pc, lr
/* /*
* Function: *_set_pgd(pgd_t *pgd) * Function: *_switch_mm(pgd_t *pgd)
* Params : pgd New page tables/MEMC mapping * Params : pgd New page tables/MEMC mapping
* Purpose : update MEMC hardware with new mapping * Purpose : update MEMC hardware with new mapping
*/ */
.word page_nr .word page_nr
_arm3_set_pgd: mcr p15, 0, r1, c1, c0, 0 @ flush cache _arm3_switch_mm:
_arm2_set_pgd: stmfd sp!, {lr} mcr p15, 0, r1, c1, c0, 0 @ flush cache
ldr r1, _arm3_set_pgd - 4 _arm2_switch_mm:
stmfd sp!, {lr}
ldr r1, _arm3_switch_mm - 4
ldr r2, [r1] ldr r2, [r1]
sub r0, r0, #256 * 4 @ start of MEMC tables sub r0, r0, #256 * 4 @ start of MEMC tables
add r1, r0, r2, lsl #2 @ end of tables add r1, r0, r2, lsl #2 @ end of tables
...@@ -289,7 +291,7 @@ cpu_arm3_name: ...@@ -289,7 +291,7 @@ cpu_arm3_name:
arm2_processor_functions: arm2_processor_functions:
.word _arm2_proc_init .word _arm2_proc_init
.word _arm2_proc_fin .word _arm2_proc_fin
.word _arm2_set_pgd .word _arm2_switch_mm
.word _arm2_xchg_1 .word _arm2_xchg_1
.word _arm2_xchg_4 .word _arm2_xchg_4
...@@ -297,7 +299,7 @@ arm2_processor_functions: ...@@ -297,7 +299,7 @@ arm2_processor_functions:
arm250_processor_functions: arm250_processor_functions:
.word _arm2_proc_init .word _arm2_proc_init
.word _arm2_proc_fin .word _arm2_proc_fin
.word _arm2_set_pgd .word _arm2_switch_mm
.word _arm3_xchg_1 .word _arm3_xchg_1
.word _arm3_xchg_4 .word _arm3_xchg_4
...@@ -305,7 +307,7 @@ arm250_processor_functions: ...@@ -305,7 +307,7 @@ arm250_processor_functions:
arm3_processor_functions: arm3_processor_functions:
.word _arm3_proc_init .word _arm3_proc_init
.word _arm3_proc_fin .word _arm3_proc_fin
.word _arm3_set_pgd .word _arm3_switch_mm
.word _arm3_xchg_1 .word _arm3_xchg_1
.word _arm3_xchg_4 .word _arm3_xchg_4
......
arch/arm/mm/proc-arm6_7.S
View file @ 27510721
...@@ -206,13 +206,13 @@ ENTRY(cpu_arm7_do_idle) ...@@ -206,13 +206,13 @@ ENTRY(cpu_arm7_do_idle)
mov pc, lr mov pc, lr
/* /*
* Function: arm6_7_set_pgd(unsigned long pgd_phys) * Function: arm6_7_switch_mm(unsigned long pgd_phys)
* Params : pgd_phys Physical address of page table * Params : pgd_phys Physical address of page table
* Purpose : Perform a task switch, saving the old processes state, and restoring * Purpose : Perform a task switch, saving the old processes state, and restoring
* the new. * the new.
*/ */
ENTRY(cpu_arm6_set_pgd) ENTRY(cpu_arm6_switch_mm)
ENTRY(cpu_arm7_set_pgd) ENTRY(cpu_arm7_switch_mm)
mov r1, #0 mov r1, #0
mcr p15, 0, r1, c7, c0, 0 @ flush cache mcr p15, 0, r1, c7, c0, 0 @ flush cache
mcr p15, 0, r0, c2, c0, 0 @ update page table ptr mcr p15, 0, r0, c2, c0, 0 @ update page table ptr
...@@ -319,7 +319,7 @@ ENTRY(arm6_processor_functions) ...@@ -319,7 +319,7 @@ ENTRY(arm6_processor_functions)
.word cpu_arm6_icache_invalidate_page .word cpu_arm6_icache_invalidate_page
/* pgtable */ /* pgtable */
.word cpu_arm6_set_pgd .word cpu_arm6_switch_mm
.word cpu_arm6_set_pte .word cpu_arm6_set_pte
.size arm6_processor_functions, . - arm6_processor_functions .size arm6_processor_functions, . - arm6_processor_functions
...@@ -351,7 +351,7 @@ ENTRY(arm7_processor_functions) ...@@ -351,7 +351,7 @@ ENTRY(arm7_processor_functions)
.word cpu_arm7_icache_invalidate_page .word cpu_arm7_icache_invalidate_page
/* pgtable */ /* pgtable */
.word cpu_arm7_set_pgd .word cpu_arm7_switch_mm
.word cpu_arm7_set_pte .word cpu_arm7_set_pte
.size arm7_processor_functions, . - arm7_processor_functions .size arm7_processor_functions, . - arm7_processor_functions
......
arch/arm/mm/proc-arm720.S
View file @ 27510721
...@@ -67,12 +67,12 @@ ENTRY(cpu_arm720_do_idle) ...@@ -67,12 +67,12 @@ ENTRY(cpu_arm720_do_idle)
mov pc, lr mov pc, lr
/* /*
* Function: arm720_set_pgd(unsigned long pgd_phys) * Function: arm720_switch_mm(unsigned long pgd_phys)
* Params : pgd_phys Physical address of page table * Params : pgd_phys Physical address of page table
* Purpose : Perform a task switch, saving the old process' state and restoring * Purpose : Perform a task switch, saving the old process' state and restoring
* the new. * the new.
*/ */
ENTRY(cpu_arm720_set_pgd) ENTRY(cpu_arm720_switch_mm)
mov r1, #0 mov r1, #0
mcr p15, 0, r1, c7, c7, 0 @ invalidate cache mcr p15, 0, r1, c7, c7, 0 @ invalidate cache
mcr p15, 0, r0, c2, c0, 0 @ update page table ptr mcr p15, 0, r0, c2, c0, 0 @ update page table ptr
...@@ -154,7 +154,7 @@ ENTRY(arm720_processor_functions) ...@@ -154,7 +154,7 @@ ENTRY(arm720_processor_functions)
.word cpu_arm720_reset .word cpu_arm720_reset
.word cpu_arm720_do_idle .word cpu_arm720_do_idle
.word cpu_arm720_dcache_clean_area .word cpu_arm720_dcache_clean_area
.word cpu_arm720_set_pgd .word cpu_arm720_switch_mm
.word cpu_arm720_set_pte .word cpu_arm720_set_pte
.size arm720_processor_functions, . - arm720_processor_functions .size arm720_processor_functions, . - arm720_processor_functions
......
arch/arm/mm/proc-arm920.S
View file @ 27510721
...@@ -293,14 +293,14 @@ ENTRY(cpu_arm920_dcache_clean_area) ...@@ -293,14 +293,14 @@ ENTRY(cpu_arm920_dcache_clean_area)
/* =============================== PageTable ============================== */ /* =============================== PageTable ============================== */
/* /*
* cpu_arm920_set_pgd(pgd) * cpu_arm920_switch_mm(pgd)
* *
* Set the translation base pointer to be as described by pgd. * Set the translation base pointer to be as described by pgd.
* *
* pgd: new page tables * pgd: new page tables
*/ */
.align 5 .align 5
ENTRY(cpu_arm920_set_pgd) ENTRY(cpu_arm920_switch_mm)
mov ip, #0 mov ip, #0
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
...@@ -422,7 +422,7 @@ arm920_processor_functions: ...@@ -422,7 +422,7 @@ arm920_processor_functions:
.word cpu_arm920_reset .word cpu_arm920_reset
.word cpu_arm920_do_idle .word cpu_arm920_do_idle
.word cpu_arm920_dcache_clean_area .word cpu_arm920_dcache_clean_area
.word cpu_arm920_set_pgd .word cpu_arm920_switch_mm
.word cpu_arm920_set_pte .word cpu_arm920_set_pte
.size arm920_processor_functions, . - arm920_processor_functions .size arm920_processor_functions, . - arm920_processor_functions
......
arch/arm/mm/proc-arm922.S
View file @ 27510721
...@@ -297,14 +297,14 @@ ENTRY(cpu_arm922_dcache_clean_area) ...@@ -297,14 +297,14 @@ ENTRY(cpu_arm922_dcache_clean_area)
/* =============================== PageTable ============================== */ /* =============================== PageTable ============================== */
/* /*
* cpu_arm922_set_pgd(pgd) * cpu_arm922_switch_mm(pgd)
* *
* Set the translation base pointer to be as described by pgd. * Set the translation base pointer to be as described by pgd.
* *
* pgd: new page tables * pgd: new page tables
*/ */
.align 5 .align 5
ENTRY(cpu_arm922_set_pgd) ENTRY(cpu_arm922_switch_mm)
mov ip, #0 mov ip, #0
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
...@@ -426,7 +426,7 @@ arm922_processor_functions: ...@@ -426,7 +426,7 @@ arm922_processor_functions:
.word cpu_arm922_reset .word cpu_arm922_reset
.word cpu_arm922_do_idle .word cpu_arm922_do_idle
.word cpu_arm922_dcache_clean_area .word cpu_arm922_dcache_clean_area
.word cpu_arm922_set_pgd .word cpu_arm922_switch_mm
.word cpu_arm922_set_pte .word cpu_arm922_set_pte
.size arm922_processor_functions, . - arm922_processor_functions .size arm922_processor_functions, . - arm922_processor_functions
......
arch/arm/mm/proc-arm926.S
View file @ 27510721
...@@ -305,14 +305,14 @@ ENTRY(cpu_arm926_dcache_clean_area) ...@@ -305,14 +305,14 @@ ENTRY(cpu_arm926_dcache_clean_area)
/* =============================== PageTable ============================== */ /* =============================== PageTable ============================== */
/* /*
* cpu_arm926_set_pgd(pgd) * cpu_arm926_switch_mm(pgd)
* *
* Set the translation base pointer to be as described by pgd. * Set the translation base pointer to be as described by pgd.
* *
* pgd: new page tables * pgd: new page tables
*/ */
.align 5 .align 5
ENTRY(cpu_arm926_set_pgd) ENTRY(cpu_arm926_switch_mm)
mov ip, #0 mov ip, #0
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
...@@ -441,7 +441,7 @@ arm926_processor_functions: ...@@ -441,7 +441,7 @@ arm926_processor_functions:
.word cpu_arm926_reset .word cpu_arm926_reset
.word cpu_arm926_do_idle .word cpu_arm926_do_idle
.word cpu_arm926_dcache_clean_area .word cpu_arm926_dcache_clean_area
.word cpu_arm926_set_pgd .word cpu_arm926_switch_mm
.word cpu_arm926_set_pte .word cpu_arm926_set_pte
.size arm926_processor_functions, . - arm926_processor_functions .size arm926_processor_functions, . - arm926_processor_functions
......
arch/arm/mm/proc-sa110.S
View file @ 27510721
...@@ -135,14 +135,14 @@ ENTRY(cpu_sa110_dcache_clean_area) ...@@ -135,14 +135,14 @@ ENTRY(cpu_sa110_dcache_clean_area)
/* =============================== PageTable ============================== */ /* =============================== PageTable ============================== */
/* /*
* cpu_sa110_set_pgd(pgd) * cpu_sa110_switch_mm(pgd)
* *
* Set the translation base pointer to be as described by pgd. * Set the translation base pointer to be as described by pgd.
* *
* pgd: new page tables * pgd: new page tables
*/ */
.align 5 .align 5
ENTRY(cpu_sa110_set_pgd) ENTRY(cpu_sa110_switch_mm)
flush_110_dcache r3, ip, r1 flush_110_dcache r3, ip, r1
mov r1, #0 mov r1, #0
mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
...@@ -222,7 +222,7 @@ ENTRY(sa110_processor_functions) ...@@ -222,7 +222,7 @@ ENTRY(sa110_processor_functions)
.word cpu_sa110_dcache_clean_area .word cpu_sa110_dcache_clean_area
/* pgtable */ /* pgtable */
.word cpu_sa110_set_pgd .word cpu_sa110_switch_mm
.word cpu_sa110_set_pte .word cpu_sa110_set_pte
.size sa110_processor_functions, . - sa110_processor_functions .size sa110_processor_functions, . - sa110_processor_functions
......
arch/arm/mm/proc-sa1100.S
View file @ 27510721
...@@ -158,14 +158,14 @@ ENTRY(cpu_sa1100_dcache_clean_area) ...@@ -158,14 +158,14 @@ ENTRY(cpu_sa1100_dcache_clean_area)
/* =============================== PageTable ============================== */ /* =============================== PageTable ============================== */
/* /*
* cpu_sa1100_set_pgd(pgd) * cpu_sa1100_switch_mm(pgd)
* *
* Set the translation base pointer to be as described by pgd. * Set the translation base pointer to be as described by pgd.
* *
* pgd: new page tables * pgd: new page tables
*/ */
.align 5 .align 5
ENTRY(cpu_sa1100_set_pgd) ENTRY(cpu_sa1100_switch_mm)
flush_1100_dcache r3, ip, r1 flush_1100_dcache r3, ip, r1
mov ip, #0 mov ip, #0
mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
...@@ -247,7 +247,7 @@ ENTRY(sa1100_processor_functions) ...@@ -247,7 +247,7 @@ ENTRY(sa1100_processor_functions)
.word cpu_sa1100_reset .word cpu_sa1100_reset
.word cpu_sa1100_do_idle .word cpu_sa1100_do_idle
.word cpu_sa1100_dcache_clean_area .word cpu_sa1100_dcache_clean_area
.word cpu_sa1100_set_pgd .word cpu_sa1100_switch_mm
.word cpu_sa1100_set_pte .word cpu_sa1100_set_pte
.size sa1100_processor_functions, . - sa1100_processor_functions .size sa1100_processor_functions, . - sa1100_processor_functions
......
arch/arm/mm/proc-xscale.S
View file @ 27510721
...@@ -490,14 +490,14 @@ ENTRY(xscale_dtlb_unlock) ...@@ -490,14 +490,14 @@ ENTRY(xscale_dtlb_unlock)
#define PTE_CACHE_WRITE_ALLOCATE 0 #define PTE_CACHE_WRITE_ALLOCATE 0
/* /*
* cpu_xscale_set_pgd(pgd) * cpu_xscale_switch_mm(pgd)
* *
* Set the translation base pointer to be as described by pgd. * Set the translation base pointer to be as described by pgd.
* *
* pgd: new page tables * pgd: new page tables
*/ */
.align 5 .align 5
ENTRY(cpu_xscale_set_pgd) ENTRY(cpu_xscale_switch_mm)
clean_d_cache r1, r2 clean_d_cache r1, r2
mcr p15, 0, ip, c7, c5, 0 @ Invalidate I cache & BTB mcr p15, 0, ip, c7, c5, 0 @ Invalidate I cache & BTB
mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
...@@ -617,7 +617,7 @@ ENTRY(xscale_processor_functions) ...@@ -617,7 +617,7 @@ ENTRY(xscale_processor_functions)
.word cpu_xscale_reset .word cpu_xscale_reset
.word cpu_xscale_do_idle .word cpu_xscale_do_idle
.word cpu_xscale_dcache_clean_area .word cpu_xscale_dcache_clean_area
.word cpu_xscale_set_pgd .word cpu_xscale_switch_mm
.word cpu_xscale_set_pte .word cpu_xscale_set_pte
.size xscale_processor_functions, . - xscale_processor_functions .size xscale_processor_functions, . - xscale_processor_functions
......
include/asm-arm/cpu-multi26.h
View file @ 27510721
...@@ -24,7 +24,7 @@ extern struct processor { ...@@ -24,7 +24,7 @@ extern struct processor {
/* Disable any processor specifics */ /* Disable any processor specifics */
void (*_proc_fin)(void); void (*_proc_fin)(void);
/* set the MEMC hardware mappings */ /* set the MEMC hardware mappings */
void (*_set_pgd)(pgd_t *pgd); void (*_switch_mm)(pgd_t *pgd);
/* XCHG */ /* XCHG */
unsigned long (*_xchg_1)(unsigned long x, volatile void *ptr); unsigned long (*_xchg_1)(unsigned long x, volatile void *ptr);
unsigned long (*_xchg_4)(unsigned long x, volatile void *ptr); unsigned long (*_xchg_4)(unsigned long x, volatile void *ptr);
...@@ -37,7 +37,7 @@ extern const struct processor arm3_processor_functions; ...@@ -37,7 +37,7 @@ extern const struct processor arm3_processor_functions;
#define cpu_proc_init() processor._proc_init() #define cpu_proc_init() processor._proc_init()
#define cpu_proc_fin() processor._proc_fin() #define cpu_proc_fin() processor._proc_fin()
#define cpu_do_idle() do { } while (0) #define cpu_do_idle() do { } while (0)
#define cpu_switch_mm(pgd,mm) processor._set_pgd(pgd) #define cpu_switch_mm(pgd,mm) processor._switch_mm(pgd)
#define cpu_xchg_1(x,ptr) processor._xchg_1(x,ptr) #define cpu_xchg_1(x,ptr) processor._xchg_1(x,ptr)
#define cpu_xchg_4(x,ptr) processor._xchg_4(x,ptr) #define cpu_xchg_4(x,ptr) processor._xchg_4(x,ptr)
......
include/asm-arm/cpu-single.h
View file @ 27510721
...@@ -27,7 +27,7 @@ ...@@ -27,7 +27,7 @@
#define cpu_reset __cpu_fn(CPU_NAME,_reset) #define cpu_reset __cpu_fn(CPU_NAME,_reset)
#define cpu_do_idle __cpu_fn(CPU_NAME,_do_idle) #define cpu_do_idle __cpu_fn(CPU_NAME,_do_idle)
#define cpu_dcache_clean_area __cpu_fn(CPU_NAME,_dcache_clean_area) #define cpu_dcache_clean_area __cpu_fn(CPU_NAME,_dcache_clean_area)
#define cpu_set_pgd __cpu_fn(CPU_NAME,_set_pgd) #define cpu__switch_mm __cpu_fn(CPU_NAME,_switch_mm)
#define cpu_set_pte __cpu_fn(CPU_NAME,_set_pte) #define cpu_set_pte __cpu_fn(CPU_NAME,_set_pte)
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
...@@ -42,12 +42,12 @@ extern void cpu_proc_init(void); ...@@ -42,12 +42,12 @@ extern void cpu_proc_init(void);
extern void cpu_proc_fin(void); extern void cpu_proc_fin(void);
extern int cpu_do_idle(void); extern int cpu_do_idle(void);
extern void cpu_dcache_clean_area(void *, int); extern void cpu_dcache_clean_area(void *, int);
extern void cpu_set_pgd(unsigned long pgd_phys, struct mm_struct *mm); extern void cpu__switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
extern void cpu_set_pte(pte_t *ptep, pte_t pte); extern void cpu_set_pte(pte_t *ptep, pte_t pte);
extern volatile void cpu_reset(unsigned long addr); extern volatile void cpu_reset(unsigned long addr);
#define cpu_switch_mm(pgd,mm) cpu_set_pgd(__virt_to_phys((unsigned long)(pgd)),mm) #define cpu_switch_mm(pgd,mm) cpu__switch_mm(__virt_to_phys((unsigned long)(pgd)),mm)
#define cpu_get_pgd() \ #define cpu_get_pgd() \
({ \ ({ \
......
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