Commit 28b44556 authored by Rahul Lakkireddy's avatar Rahul Lakkireddy Committed by David S. Miller

cxgb4: collect RSS dumps

Collect RSS table and RSS VF configuration dumps.
Signed-off-by: default avatarRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: default avatarGanesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3044d0fb
...@@ -42,6 +42,11 @@ struct cudbg_cim_qcfg { ...@@ -42,6 +42,11 @@ struct cudbg_cim_qcfg {
u32 stat[4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5)]; u32 stat[4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5)];
}; };
struct cudbg_rss_vf_conf {
u32 rss_vf_vfl;
u32 rss_vf_vfh;
};
struct ireg_field { struct ireg_field {
u32 ireg_addr; u32 ireg_addr;
u32 ireg_data; u32 ireg_data;
......
...@@ -46,6 +46,8 @@ enum cudbg_dbg_entity_type { ...@@ -46,6 +46,8 @@ enum cudbg_dbg_entity_type {
CUDBG_CIM_OBQ_NCSI = 17, CUDBG_CIM_OBQ_NCSI = 17,
CUDBG_EDC0 = 18, CUDBG_EDC0 = 18,
CUDBG_EDC1 = 19, CUDBG_EDC1 = 19,
CUDBG_RSS = 22,
CUDBG_RSS_VF_CONF = 25,
CUDBG_TP_INDIRECT = 36, CUDBG_TP_INDIRECT = 36,
CUDBG_SGE_INDIRECT = 37, CUDBG_SGE_INDIRECT = 37,
CUDBG_ULPRX_LA = 41, CUDBG_ULPRX_LA = 41,
......
...@@ -528,6 +528,52 @@ int cudbg_collect_edc1_meminfo(struct cudbg_init *pdbg_init, ...@@ -528,6 +528,52 @@ int cudbg_collect_edc1_meminfo(struct cudbg_init *pdbg_init,
MEM_EDC1); MEM_EDC1);
} }
int cudbg_collect_rss(struct cudbg_init *pdbg_init,
struct cudbg_buffer *dbg_buff,
struct cudbg_error *cudbg_err)
{
struct adapter *padap = pdbg_init->adap;
struct cudbg_buffer temp_buff = { 0 };
int rc;
rc = cudbg_get_buff(dbg_buff, RSS_NENTRIES * sizeof(u16), &temp_buff);
if (rc)
return rc;
rc = t4_read_rss(padap, (u16 *)temp_buff.data);
if (rc) {
cudbg_err->sys_err = rc;
cudbg_put_buff(&temp_buff, dbg_buff);
return rc;
}
cudbg_write_and_release_buff(&temp_buff, dbg_buff);
return rc;
}
int cudbg_collect_rss_vf_config(struct cudbg_init *pdbg_init,
struct cudbg_buffer *dbg_buff,
struct cudbg_error *cudbg_err)
{
struct adapter *padap = pdbg_init->adap;
struct cudbg_buffer temp_buff = { 0 };
struct cudbg_rss_vf_conf *vfconf;
int vf, rc, vf_count;
vf_count = padap->params.arch.vfcount;
rc = cudbg_get_buff(dbg_buff,
vf_count * sizeof(struct cudbg_rss_vf_conf),
&temp_buff);
if (rc)
return rc;
vfconf = (struct cudbg_rss_vf_conf *)temp_buff.data;
for (vf = 0; vf < vf_count; vf++)
t4_read_rss_vf_config(padap, vf, &vfconf[vf].rss_vf_vfl,
&vfconf[vf].rss_vf_vfh, true);
cudbg_write_and_release_buff(&temp_buff, dbg_buff);
return rc;
}
int cudbg_collect_tp_indirect(struct cudbg_init *pdbg_init, int cudbg_collect_tp_indirect(struct cudbg_init *pdbg_init,
struct cudbg_buffer *dbg_buff, struct cudbg_buffer *dbg_buff,
struct cudbg_error *cudbg_err) struct cudbg_error *cudbg_err)
......
...@@ -75,6 +75,12 @@ int cudbg_collect_edc0_meminfo(struct cudbg_init *pdbg_init, ...@@ -75,6 +75,12 @@ int cudbg_collect_edc0_meminfo(struct cudbg_init *pdbg_init,
int cudbg_collect_edc1_meminfo(struct cudbg_init *pdbg_init, int cudbg_collect_edc1_meminfo(struct cudbg_init *pdbg_init,
struct cudbg_buffer *dbg_buff, struct cudbg_buffer *dbg_buff,
struct cudbg_error *cudbg_err); struct cudbg_error *cudbg_err);
int cudbg_collect_rss(struct cudbg_init *pdbg_init,
struct cudbg_buffer *dbg_buff,
struct cudbg_error *cudbg_err);
int cudbg_collect_rss_vf_config(struct cudbg_init *pdbg_init,
struct cudbg_buffer *dbg_buff,
struct cudbg_error *cudbg_err);
int cudbg_collect_tp_indirect(struct cudbg_init *pdbg_init, int cudbg_collect_tp_indirect(struct cudbg_init *pdbg_init,
struct cudbg_buffer *dbg_buff, struct cudbg_buffer *dbg_buff,
struct cudbg_error *cudbg_err); struct cudbg_error *cudbg_err);
......
...@@ -44,6 +44,8 @@ static const struct cxgb4_collect_entity cxgb4_collect_hw_dump[] = { ...@@ -44,6 +44,8 @@ static const struct cxgb4_collect_entity cxgb4_collect_hw_dump[] = {
{ CUDBG_CIM_OBQ_ULP3, cudbg_collect_cim_obq_ulp3 }, { CUDBG_CIM_OBQ_ULP3, cudbg_collect_cim_obq_ulp3 },
{ CUDBG_CIM_OBQ_SGE, cudbg_collect_cim_obq_sge }, { CUDBG_CIM_OBQ_SGE, cudbg_collect_cim_obq_sge },
{ CUDBG_CIM_OBQ_NCSI, cudbg_collect_cim_obq_ncsi }, { CUDBG_CIM_OBQ_NCSI, cudbg_collect_cim_obq_ncsi },
{ CUDBG_RSS, cudbg_collect_rss },
{ CUDBG_RSS_VF_CONF, cudbg_collect_rss_vf_config },
{ CUDBG_TP_INDIRECT, cudbg_collect_tp_indirect }, { CUDBG_TP_INDIRECT, cudbg_collect_tp_indirect },
{ CUDBG_SGE_INDIRECT, cudbg_collect_sge_indirect }, { CUDBG_SGE_INDIRECT, cudbg_collect_sge_indirect },
{ CUDBG_ULPRX_LA, cudbg_collect_ulprx_la }, { CUDBG_ULPRX_LA, cudbg_collect_ulprx_la },
...@@ -144,6 +146,13 @@ static u32 cxgb4_get_entity_length(struct adapter *adap, u32 entity) ...@@ -144,6 +146,13 @@ static u32 cxgb4_get_entity_length(struct adapter *adap, u32 entity)
} }
len = cudbg_mbytes_to_bytes(len); len = cudbg_mbytes_to_bytes(len);
break; break;
case CUDBG_RSS:
len = RSS_NENTRIES * sizeof(u16);
break;
case CUDBG_RSS_VF_CONF:
len = adap->params.arch.vfcount *
sizeof(struct cudbg_rss_vf_conf);
break;
case CUDBG_TP_INDIRECT: case CUDBG_TP_INDIRECT:
switch (CHELSIO_CHIP_VERSION(adap->params.chip)) { switch (CHELSIO_CHIP_VERSION(adap->params.chip)) {
case CHELSIO_T5: case CHELSIO_T5:
......
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