Commit 28d437d5 authored by Tom Lendacky's avatar Tom Lendacky Committed by Thomas Gleixner

x86/retpoline: Add LFENCE to the retpoline/RSB filling RSB macros

The PAUSE instruction is currently used in the retpoline and RSB filling
macros as a speculation trap.  The use of PAUSE was originally suggested
because it showed a very, very small difference in the amount of
cycles/time used to execute the retpoline as compared to LFENCE.  On AMD,
the PAUSE instruction is not a serializing instruction, so the pause/jmp
loop will use excess power as it is speculated over waiting for return
to mispredict to the correct target.

The RSB filling macro is applicable to AMD, and, if software is unable to
verify that LFENCE is serializing on AMD (possible when running under a
hypervisor), the generic retpoline support will be used and, so, is also
applicable to AMD.  Keep the current usage of PAUSE for Intel, but add an
LFENCE instruction to the speculation trap for AMD.

The same sequence has been adopted by GCC for the GCC generated retpolines.
Signed-off-by: default avatarTom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarBorislav Petkov <bp@alien8.de>
Acked-by: default avatarDavid Woodhouse <dwmw@amazon.co.uk>
Acked-by: default avatarArjan van de Ven <arjan@linux.intel.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Paul Turner <pjt@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Tim Chen <tim.c.chen@linux.intel.com>
Cc: Jiri Kosina <jikos@kernel.org>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Greg Kroah-Hartman <gregkh@linux-foundation.org>
Cc: Kees Cook <keescook@google.com>
Link: https://lkml.kernel.org/r/20180113232730.31060.36287.stgit@tlendack-t1.amdoffice.net
parent c995efd5
...@@ -11,7 +11,7 @@ ...@@ -11,7 +11,7 @@
* Fill the CPU return stack buffer. * Fill the CPU return stack buffer.
* *
* Each entry in the RSB, if used for a speculative 'ret', contains an * Each entry in the RSB, if used for a speculative 'ret', contains an
* infinite 'pause; jmp' loop to capture speculative execution. * infinite 'pause; lfence; jmp' loop to capture speculative execution.
* *
* This is required in various cases for retpoline and IBRS-based * This is required in various cases for retpoline and IBRS-based
* mitigations for the Spectre variant 2 vulnerability. Sometimes to * mitigations for the Spectre variant 2 vulnerability. Sometimes to
...@@ -38,11 +38,13 @@ ...@@ -38,11 +38,13 @@
call 772f; \ call 772f; \
773: /* speculation trap */ \ 773: /* speculation trap */ \
pause; \ pause; \
lfence; \
jmp 773b; \ jmp 773b; \
772: \ 772: \
call 774f; \ call 774f; \
775: /* speculation trap */ \ 775: /* speculation trap */ \
pause; \ pause; \
lfence; \
jmp 775b; \ jmp 775b; \
774: \ 774: \
dec reg; \ dec reg; \
...@@ -73,6 +75,7 @@ ...@@ -73,6 +75,7 @@
call .Ldo_rop_\@ call .Ldo_rop_\@
.Lspec_trap_\@: .Lspec_trap_\@:
pause pause
lfence
jmp .Lspec_trap_\@ jmp .Lspec_trap_\@
.Ldo_rop_\@: .Ldo_rop_\@:
mov \reg, (%_ASM_SP) mov \reg, (%_ASM_SP)
...@@ -165,6 +168,7 @@ ...@@ -165,6 +168,7 @@
" .align 16\n" \ " .align 16\n" \
"901: call 903f;\n" \ "901: call 903f;\n" \
"902: pause;\n" \ "902: pause;\n" \
" lfence;\n" \
" jmp 902b;\n" \ " jmp 902b;\n" \
" .align 16\n" \ " .align 16\n" \
"903: addl $4, %%esp;\n" \ "903: addl $4, %%esp;\n" \
......
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