Commit 290a9f93 authored by Fabien Dessenne's avatar Fabien Dessenne Committed by Linus Walleij

pinctrl: stm32: use the hwspin_lock_timeout_in_atomic() API

Use the hwspin_lock_timeout_in_atomic() API which is the most appropriated
here. Indeed:
- hwspin_lock_() is called after spin_lock_irqsave()
- the hwspin_lock_timeout() API relies on jiffies count which won't work
  if IRQs are disabled which is the case here.
Signed-off-by: default avatarFabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@st.com>
Link: https://lore.kernel.org/r/20200615124456.27328-1-alexandre.torgue@st.comSigned-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 57597e15
...@@ -64,7 +64,7 @@ ...@@ -64,7 +64,7 @@
#define gpio_range_to_bank(chip) \ #define gpio_range_to_bank(chip) \
container_of(chip, struct stm32_gpio_bank, range) container_of(chip, struct stm32_gpio_bank, range)
#define HWSPINLOCK_TIMEOUT 5 /* msec */ #define HWSPNLCK_TIMEOUT 1000 /* usec */
static const char * const stm32_gpio_functions[] = { static const char * const stm32_gpio_functions[] = {
"gpio", "af0", "af1", "gpio", "af0", "af1",
...@@ -422,12 +422,14 @@ static int stm32_gpio_domain_activate(struct irq_domain *d, ...@@ -422,12 +422,14 @@ static int stm32_gpio_domain_activate(struct irq_domain *d,
* to avoid overriding. * to avoid overriding.
*/ */
spin_lock_irqsave(&pctl->irqmux_lock, flags); spin_lock_irqsave(&pctl->irqmux_lock, flags);
if (pctl->hwlock)
ret = hwspin_lock_timeout(pctl->hwlock, HWSPINLOCK_TIMEOUT);
if (ret) { if (pctl->hwlock) {
dev_err(pctl->dev, "Can't get hwspinlock\n"); ret = hwspin_lock_timeout_in_atomic(pctl->hwlock,
goto unlock; HWSPNLCK_TIMEOUT);
if (ret) {
dev_err(pctl->dev, "Can't get hwspinlock\n");
goto unlock;
}
} }
if (pctl->irqmux_map & BIT(irq_data->hwirq)) { if (pctl->irqmux_map & BIT(irq_data->hwirq)) {
...@@ -435,7 +437,7 @@ static int stm32_gpio_domain_activate(struct irq_domain *d, ...@@ -435,7 +437,7 @@ static int stm32_gpio_domain_activate(struct irq_domain *d,
irq_data->hwirq); irq_data->hwirq);
ret = -EBUSY; ret = -EBUSY;
if (pctl->hwlock) if (pctl->hwlock)
hwspin_unlock(pctl->hwlock); hwspin_unlock_in_atomic(pctl->hwlock);
goto unlock; goto unlock;
} else { } else {
pctl->irqmux_map |= BIT(irq_data->hwirq); pctl->irqmux_map |= BIT(irq_data->hwirq);
...@@ -444,7 +446,7 @@ static int stm32_gpio_domain_activate(struct irq_domain *d, ...@@ -444,7 +446,7 @@ static int stm32_gpio_domain_activate(struct irq_domain *d,
regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->bank_ioport_nr); regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->bank_ioport_nr);
if (pctl->hwlock) if (pctl->hwlock)
hwspin_unlock(pctl->hwlock); hwspin_unlock_in_atomic(pctl->hwlock);
unlock: unlock:
spin_unlock_irqrestore(&pctl->irqmux_lock, flags); spin_unlock_irqrestore(&pctl->irqmux_lock, flags);
...@@ -752,12 +754,13 @@ static int stm32_pmx_set_mode(struct stm32_gpio_bank *bank, ...@@ -752,12 +754,13 @@ static int stm32_pmx_set_mode(struct stm32_gpio_bank *bank,
clk_enable(bank->clk); clk_enable(bank->clk);
spin_lock_irqsave(&bank->lock, flags); spin_lock_irqsave(&bank->lock, flags);
if (pctl->hwlock) if (pctl->hwlock) {
err = hwspin_lock_timeout(pctl->hwlock, HWSPINLOCK_TIMEOUT); err = hwspin_lock_timeout_in_atomic(pctl->hwlock,
HWSPNLCK_TIMEOUT);
if (err) { if (err) {
dev_err(pctl->dev, "Can't get hwspinlock\n"); dev_err(pctl->dev, "Can't get hwspinlock\n");
goto unlock; goto unlock;
}
} }
val = readl_relaxed(bank->base + alt_offset); val = readl_relaxed(bank->base + alt_offset);
...@@ -771,7 +774,7 @@ static int stm32_pmx_set_mode(struct stm32_gpio_bank *bank, ...@@ -771,7 +774,7 @@ static int stm32_pmx_set_mode(struct stm32_gpio_bank *bank,
writel_relaxed(val, bank->base + STM32_GPIO_MODER); writel_relaxed(val, bank->base + STM32_GPIO_MODER);
if (pctl->hwlock) if (pctl->hwlock)
hwspin_unlock(pctl->hwlock); hwspin_unlock_in_atomic(pctl->hwlock);
stm32_gpio_backup_mode(bank, pin, mode, alt); stm32_gpio_backup_mode(bank, pin, mode, alt);
...@@ -871,12 +874,13 @@ static int stm32_pconf_set_driving(struct stm32_gpio_bank *bank, ...@@ -871,12 +874,13 @@ static int stm32_pconf_set_driving(struct stm32_gpio_bank *bank,
clk_enable(bank->clk); clk_enable(bank->clk);
spin_lock_irqsave(&bank->lock, flags); spin_lock_irqsave(&bank->lock, flags);
if (pctl->hwlock) if (pctl->hwlock) {
err = hwspin_lock_timeout(pctl->hwlock, HWSPINLOCK_TIMEOUT); err = hwspin_lock_timeout_in_atomic(pctl->hwlock,
HWSPNLCK_TIMEOUT);
if (err) { if (err) {
dev_err(pctl->dev, "Can't get hwspinlock\n"); dev_err(pctl->dev, "Can't get hwspinlock\n");
goto unlock; goto unlock;
}
} }
val = readl_relaxed(bank->base + STM32_GPIO_TYPER); val = readl_relaxed(bank->base + STM32_GPIO_TYPER);
...@@ -885,7 +889,7 @@ static int stm32_pconf_set_driving(struct stm32_gpio_bank *bank, ...@@ -885,7 +889,7 @@ static int stm32_pconf_set_driving(struct stm32_gpio_bank *bank,
writel_relaxed(val, bank->base + STM32_GPIO_TYPER); writel_relaxed(val, bank->base + STM32_GPIO_TYPER);
if (pctl->hwlock) if (pctl->hwlock)
hwspin_unlock(pctl->hwlock); hwspin_unlock_in_atomic(pctl->hwlock);
stm32_gpio_backup_driving(bank, offset, drive); stm32_gpio_backup_driving(bank, offset, drive);
...@@ -925,12 +929,13 @@ static int stm32_pconf_set_speed(struct stm32_gpio_bank *bank, ...@@ -925,12 +929,13 @@ static int stm32_pconf_set_speed(struct stm32_gpio_bank *bank,
clk_enable(bank->clk); clk_enable(bank->clk);
spin_lock_irqsave(&bank->lock, flags); spin_lock_irqsave(&bank->lock, flags);
if (pctl->hwlock) if (pctl->hwlock) {
err = hwspin_lock_timeout(pctl->hwlock, HWSPINLOCK_TIMEOUT); err = hwspin_lock_timeout_in_atomic(pctl->hwlock,
HWSPNLCK_TIMEOUT);
if (err) { if (err) {
dev_err(pctl->dev, "Can't get hwspinlock\n"); dev_err(pctl->dev, "Can't get hwspinlock\n");
goto unlock; goto unlock;
}
} }
val = readl_relaxed(bank->base + STM32_GPIO_SPEEDR); val = readl_relaxed(bank->base + STM32_GPIO_SPEEDR);
...@@ -939,7 +944,7 @@ static int stm32_pconf_set_speed(struct stm32_gpio_bank *bank, ...@@ -939,7 +944,7 @@ static int stm32_pconf_set_speed(struct stm32_gpio_bank *bank,
writel_relaxed(val, bank->base + STM32_GPIO_SPEEDR); writel_relaxed(val, bank->base + STM32_GPIO_SPEEDR);
if (pctl->hwlock) if (pctl->hwlock)
hwspin_unlock(pctl->hwlock); hwspin_unlock_in_atomic(pctl->hwlock);
stm32_gpio_backup_speed(bank, offset, speed); stm32_gpio_backup_speed(bank, offset, speed);
...@@ -979,12 +984,13 @@ static int stm32_pconf_set_bias(struct stm32_gpio_bank *bank, ...@@ -979,12 +984,13 @@ static int stm32_pconf_set_bias(struct stm32_gpio_bank *bank,
clk_enable(bank->clk); clk_enable(bank->clk);
spin_lock_irqsave(&bank->lock, flags); spin_lock_irqsave(&bank->lock, flags);
if (pctl->hwlock) if (pctl->hwlock) {
err = hwspin_lock_timeout(pctl->hwlock, HWSPINLOCK_TIMEOUT); err = hwspin_lock_timeout_in_atomic(pctl->hwlock,
HWSPNLCK_TIMEOUT);
if (err) { if (err) {
dev_err(pctl->dev, "Can't get hwspinlock\n"); dev_err(pctl->dev, "Can't get hwspinlock\n");
goto unlock; goto unlock;
}
} }
val = readl_relaxed(bank->base + STM32_GPIO_PUPDR); val = readl_relaxed(bank->base + STM32_GPIO_PUPDR);
...@@ -993,7 +999,7 @@ static int stm32_pconf_set_bias(struct stm32_gpio_bank *bank, ...@@ -993,7 +999,7 @@ static int stm32_pconf_set_bias(struct stm32_gpio_bank *bank,
writel_relaxed(val, bank->base + STM32_GPIO_PUPDR); writel_relaxed(val, bank->base + STM32_GPIO_PUPDR);
if (pctl->hwlock) if (pctl->hwlock)
hwspin_unlock(pctl->hwlock); hwspin_unlock_in_atomic(pctl->hwlock);
stm32_gpio_backup_bias(bank, offset, bias); stm32_gpio_backup_bias(bank, offset, bias);
......
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