Commit 29ed74c3 authored by Jon Mason's avatar Jon Mason Committed by David S. Miller

bnx2x: Use pci_dev pm_cap

Use the already existing pm_cap variable in struct pci_dev for
determining the power management offset.  This saves the driver from
having to keep track of an extra variable.
Signed-off-by: default avatarJon Mason <jdmason@kudzu.us>
Cc: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c3eb7a77
...@@ -1542,7 +1542,6 @@ struct bnx2x { ...@@ -1542,7 +1542,6 @@ struct bnx2x {
*/ */
bool fcoe_init; bool fcoe_init;
int pm_cap;
int mrrs; int mrrs;
struct delayed_work sp_task; struct delayed_work sp_task;
......
...@@ -3008,16 +3008,16 @@ int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state) ...@@ -3008,16 +3008,16 @@ int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state)
u16 pmcsr; u16 pmcsr;
/* If there is no power capability, silently succeed */ /* If there is no power capability, silently succeed */
if (!bp->pm_cap) { if (!bp->pdev->pm_cap) {
BNX2X_DEV_INFO("No power capability. Breaking.\n"); BNX2X_DEV_INFO("No power capability. Breaking.\n");
return 0; return 0;
} }
pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr); pci_read_config_word(bp->pdev, bp->pdev->pm_cap + PCI_PM_CTRL, &pmcsr);
switch (state) { switch (state) {
case PCI_D0: case PCI_D0:
pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, pci_write_config_word(bp->pdev, bp->pdev->pm_cap + PCI_PM_CTRL,
((pmcsr & ~PCI_PM_CTRL_STATE_MASK) | ((pmcsr & ~PCI_PM_CTRL_STATE_MASK) |
PCI_PM_CTRL_PME_STATUS)); PCI_PM_CTRL_PME_STATUS));
...@@ -3041,7 +3041,7 @@ int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state) ...@@ -3041,7 +3041,7 @@ int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state)
if (bp->wol) if (bp->wol)
pmcsr |= PCI_PM_CTRL_PME_ENABLE; pmcsr |= PCI_PM_CTRL_PME_ENABLE;
pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, pci_write_config_word(bp->pdev, bp->pdev->pm_cap + PCI_PM_CTRL,
pmcsr); pmcsr);
/* No more memory access after this point until /* No more memory access after this point until
......
...@@ -1387,9 +1387,9 @@ static bool bnx2x_is_nvm_accessible(struct bnx2x *bp) ...@@ -1387,9 +1387,9 @@ static bool bnx2x_is_nvm_accessible(struct bnx2x *bp)
u16 pm = 0; u16 pm = 0;
struct net_device *dev = pci_get_drvdata(bp->pdev); struct net_device *dev = pci_get_drvdata(bp->pdev);
if (bp->pm_cap) if (bp->pdev->pm_cap)
rc = pci_read_config_word(bp->pdev, rc = pci_read_config_word(bp->pdev,
bp->pm_cap + PCI_PM_CTRL, &pm); bp->pdev->pm_cap + PCI_PM_CTRL, &pm);
if ((rc && !netif_running(dev)) || if ((rc && !netif_running(dev)) ||
(!rc && ((pm & PCI_PM_CTRL_STATE_MASK) != (__force u16)PCI_D0))) (!rc && ((pm & PCI_PM_CTRL_STATE_MASK) != (__force u16)PCI_D0)))
......
...@@ -8652,6 +8652,7 @@ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode) ...@@ -8652,6 +8652,7 @@ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode)
else if (bp->wol) { else if (bp->wol) {
u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0;
u8 *mac_addr = bp->dev->dev_addr; u8 *mac_addr = bp->dev->dev_addr;
struct pci_dev *pdev = bp->pdev;
u32 val; u32 val;
u16 pmc; u16 pmc;
...@@ -8668,9 +8669,9 @@ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode) ...@@ -8668,9 +8669,9 @@ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode)
EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + entry + 4, val); EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + entry + 4, val);
/* Enable the PME and clear the status */ /* Enable the PME and clear the status */
pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmc); pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmc);
pmc |= PCI_PM_CTRL_PME_ENABLE | PCI_PM_CTRL_PME_STATUS; pmc |= PCI_PM_CTRL_PME_ENABLE | PCI_PM_CTRL_PME_STATUS;
pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, pmc); pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, pmc);
reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_EN; reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_EN;
...@@ -10399,7 +10400,7 @@ static void bnx2x_get_common_hwinfo(struct bnx2x *bp) ...@@ -10399,7 +10400,7 @@ static void bnx2x_get_common_hwinfo(struct bnx2x *bp)
break; break;
} }
pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_PMC, &pmc); pci_read_config_word(bp->pdev, bp->pdev->pm_cap + PCI_PM_PMC, &pmc);
bp->flags |= (pmc & PCI_PM_CAP_PME_D3cold) ? 0 : NO_WOL_FLAG; bp->flags |= (pmc & PCI_PM_CAP_PME_D3cold) ? 0 : NO_WOL_FLAG;
BNX2X_DEV_INFO("%sWoL capable\n", BNX2X_DEV_INFO("%sWoL capable\n",
...@@ -12141,8 +12142,7 @@ static int bnx2x_init_dev(struct bnx2x *bp, struct pci_dev *pdev, ...@@ -12141,8 +12142,7 @@ static int bnx2x_init_dev(struct bnx2x *bp, struct pci_dev *pdev,
} }
if (IS_PF(bp)) { if (IS_PF(bp)) {
bp->pm_cap = pdev->pm_cap; if (!pdev->pm_cap) {
if (bp->pm_cap == 0) {
dev_err(&bp->pdev->dev, dev_err(&bp->pdev->dev,
"Cannot find power management capability, aborting\n"); "Cannot find power management capability, aborting\n");
rc = -EIO; rc = -EIO;
......
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