Commit 2a2ab4d5 authored by Laurentiu Tudor's avatar Laurentiu Tudor Committed by Shawn Guo

arm64: dts: ls1043a: use a pseudo-bus to constrain usb and sata dma size

Wrap the usb and sata controllers in an intermediate simple-bus and use
it to constrain the dma address size of these usb controllers to the 40
bits that they generate toward the interconnect.  This is required
because the SoC uses 48 bits address sizes and this mismatch would lead
to smmu context faults because the usb generates 40-bit addresses while
the smmu page tables are populated with 48-bit wide addresses.
Suggested-by: default avatarRobin Murphy <robin.murphy@arm.com>
Signed-off-by: default avatarLaurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: default avatarLi Yang <leoyang.li@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 4b211ebb
......@@ -816,51 +816,59 @@ QORIQ_CLK_PLL_DIV(1)>,
QORIQ_CLK_PLL_DIV(1)>;
};
usb0: usb@2f00000 {
compatible = "snps,dwc3";
reg = <0x0 0x2f00000 0x0 0x10000>;
interrupts = <0 60 0x4>;
dr_mode = "host";
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
usb3-lpm-capable;
snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
status = "disabled";
};
aux_bus: aux_bus {
#address-cells = <2>;
#size-cells = <2>;
compatible = "simple-bus";
ranges;
dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
usb0: usb@2f00000 {
compatible = "snps,dwc3";
reg = <0x0 0x2f00000 0x0 0x10000>;
interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
usb3-lpm-capable;
snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
status = "disabled";
};
usb1: usb@3000000 {
compatible = "snps,dwc3";
reg = <0x0 0x3000000 0x0 0x10000>;
interrupts = <0 61 0x4>;
dr_mode = "host";
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
usb3-lpm-capable;
snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
status = "disabled";
};
usb1: usb@3000000 {
compatible = "snps,dwc3";
reg = <0x0 0x3000000 0x0 0x10000>;
interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
usb3-lpm-capable;
snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
status = "disabled";
};
usb2: usb@3100000 {
compatible = "snps,dwc3";
reg = <0x0 0x3100000 0x0 0x10000>;
interrupts = <0 63 0x4>;
dr_mode = "host";
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
usb3-lpm-capable;
snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
status = "disabled";
};
usb2: usb@3100000 {
compatible = "snps,dwc3";
reg = <0x0 0x3100000 0x0 0x10000>;
interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
usb3-lpm-capable;
snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
status = "disabled";
};
sata: sata@3200000 {
compatible = "fsl,ls1043a-ahci";
reg = <0x0 0x3200000 0x0 0x10000>,
<0x0 0x20140520 0x0 0x4>;
reg-names = "ahci", "sata-ecc";
interrupts = <0 69 0x4>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
dma-coherent;
sata: sata@3200000 {
compatible = "fsl,ls1043a-ahci";
reg = <0x0 0x3200000 0x0 0x10000>,
<0x0 0x20140520 0x0 0x4>;
reg-names = "ahci", "sata-ecc";
interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
dma-coherent;
};
};
msi1: msi-controller1@1571000 {
......
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