Commit 2a54bd6e authored by Jerry (Fangzhi) Zuo's avatar Jerry (Fangzhi) Zuo Committed by Alex Deucher

drm/amd/display: Use actual TG instance instead of pipe instance

Signed-off-by: default avatarJerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d1aaad05
...@@ -56,7 +56,7 @@ void dce_pipe_control_lock(struct dc *dc, ...@@ -56,7 +56,7 @@ void dce_pipe_control_lock(struct dc *dc,
if (lock && pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg)) if (lock && pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg))
return; return;
val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->pipe_idx], val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst],
BLND_DCP_GRPH_V_UPDATE_LOCK, &dcp_grph, BLND_DCP_GRPH_V_UPDATE_LOCK, &dcp_grph,
BLND_SCL_V_UPDATE_LOCK, &scl, BLND_SCL_V_UPDATE_LOCK, &scl,
BLND_BLND_V_UPDATE_LOCK, &blnd, BLND_BLND_V_UPDATE_LOCK, &blnd,
...@@ -67,19 +67,19 @@ void dce_pipe_control_lock(struct dc *dc, ...@@ -67,19 +67,19 @@ void dce_pipe_control_lock(struct dc *dc,
blnd = lock_val; blnd = lock_val;
update_lock_mode = lock_val; update_lock_mode = lock_val;
REG_SET_2(BLND_V_UPDATE_LOCK[pipe->pipe_idx], val, REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val,
BLND_DCP_GRPH_V_UPDATE_LOCK, dcp_grph, BLND_DCP_GRPH_V_UPDATE_LOCK, dcp_grph,
BLND_SCL_V_UPDATE_LOCK, scl); BLND_SCL_V_UPDATE_LOCK, scl);
if (hws->masks->BLND_BLND_V_UPDATE_LOCK != 0) if (hws->masks->BLND_BLND_V_UPDATE_LOCK != 0)
REG_SET_2(BLND_V_UPDATE_LOCK[pipe->pipe_idx], val, REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val,
BLND_BLND_V_UPDATE_LOCK, blnd, BLND_BLND_V_UPDATE_LOCK, blnd,
BLND_V_UPDATE_LOCK_MODE, update_lock_mode); BLND_V_UPDATE_LOCK_MODE, update_lock_mode);
if (hws->wa.blnd_crtc_trigger) { if (hws->wa.blnd_crtc_trigger) {
if (!lock) { if (!lock) {
uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->pipe_idx]); uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst]);
REG_WRITE(CRTC_H_BLANK_START_END[pipe->pipe_idx], value); REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value);
} }
} }
} }
......
...@@ -1132,7 +1132,7 @@ static void build_audio_output( ...@@ -1132,7 +1132,7 @@ static void build_audio_output(
static void get_surface_visual_confirm_color(const struct pipe_ctx *pipe_ctx, static void get_surface_visual_confirm_color(const struct pipe_ctx *pipe_ctx,
struct tg_color *color) struct tg_color *color)
{ {
uint32_t color_value = MAX_TG_COLOR_VALUE * (4 - pipe_ctx->pipe_idx) / 4; uint32_t color_value = MAX_TG_COLOR_VALUE * (4 - pipe_ctx->stream_res.tg->inst) / 4;
switch (pipe_ctx->plane_res.scl_data.format) { switch (pipe_ctx->plane_res.scl_data.format) {
case PIXEL_FORMAT_ARGB8888: case PIXEL_FORMAT_ARGB8888:
......
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