Commit 2a6a491d authored by Sung Joon Kim's avatar Sung Joon Kim Committed by Alex Deucher

drm/amd/display: Fix HDMI framepack 3D test issue

[why]
Bandwidth validation failure on framepack tests.
Need to double pixel clock when 3D format is
framepack. Also for HDMI displays, we need to
keep the ITC flag to 1 by default.

[how]
Double the pixel clock when using framepack 3D format.
Set hdmi ITC bit to 1.
Reviewed-by: default avatarCharlene Liu <charlene.liu@amd.com>
Acked-by: default avatarRoman Li <roman.li@amd.com>
Signed-off-by: default avatarSung Joon Kim <sungkim@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent da2d16fc
......@@ -4229,7 +4229,7 @@ static void set_avi_info_frame(
switch (stream->content_type) {
case DISPLAY_CONTENT_TYPE_NO_DATA:
hdmi_info.bits.CN0_CN1 = 0;
hdmi_info.bits.ITC = 0;
hdmi_info.bits.ITC = 1;
break;
case DISPLAY_CONTENT_TYPE_GRAPHICS:
hdmi_info.bits.CN0_CN1 = 0;
......
......@@ -571,6 +571,8 @@ static void populate_dml_timing_cfg_from_stream_state(struct dml_timing_cfg_st *
out->RefreshRate[location] = ((in->timing.pix_clk_100hz * 100) / in->timing.h_total) / in->timing.v_total;
out->VFrontPorch[location] = in->timing.v_front_porch;
out->PixelClock[location] = in->timing.pix_clk_100hz / 10000.00;
if (in->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)
out->PixelClock[location] *= 2;
out->HTotal[location] = in->timing.h_total;
out->VTotal[location] = in->timing.v_total;
out->Interlace[location] = in->timing.flags.INTERLACE;
......
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