Commit 2acc73f8 authored by Christian König's avatar Christian König

drm/amdgpu: use drm_exec for MES testing

Start using the new component here as well.
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230711133122.3710-6-christian.koenig@amd.com
parent 8a206685
...@@ -22,6 +22,7 @@ ...@@ -22,6 +22,7 @@
*/ */
#include <linux/firmware.h> #include <linux/firmware.h>
#include <drm/drm_exec.h>
#include "amdgpu_mes.h" #include "amdgpu_mes.h"
#include "amdgpu.h" #include "amdgpu.h"
...@@ -1168,34 +1169,31 @@ int amdgpu_mes_ctx_map_meta_data(struct amdgpu_device *adev, ...@@ -1168,34 +1169,31 @@ int amdgpu_mes_ctx_map_meta_data(struct amdgpu_device *adev,
struct amdgpu_mes_ctx_data *ctx_data) struct amdgpu_mes_ctx_data *ctx_data)
{ {
struct amdgpu_bo_va *bo_va; struct amdgpu_bo_va *bo_va;
struct ww_acquire_ctx ticket;
struct list_head list;
struct amdgpu_bo_list_entry pd;
struct ttm_validate_buffer csa_tv;
struct amdgpu_sync sync; struct amdgpu_sync sync;
struct drm_exec exec;
int r; int r;
amdgpu_sync_create(&sync); amdgpu_sync_create(&sync);
INIT_LIST_HEAD(&list);
INIT_LIST_HEAD(&csa_tv.head);
csa_tv.bo = &ctx_data->meta_data_obj->tbo; drm_exec_init(&exec, 0);
csa_tv.num_shared = 1; drm_exec_until_all_locked(&exec) {
r = drm_exec_lock_obj(&exec,
list_add(&csa_tv.head, &list); &ctx_data->meta_data_obj->tbo.base);
amdgpu_vm_get_pd_bo(vm, &list, &pd); drm_exec_retry_on_contention(&exec);
if (unlikely(r))
r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL); goto error_fini_exec;
if (r) {
DRM_ERROR("failed to reserve meta data BO: err=%d\n", r); r = amdgpu_vm_lock_pd(vm, &exec, 0);
return r; drm_exec_retry_on_contention(&exec);
if (unlikely(r))
goto error_fini_exec;
} }
bo_va = amdgpu_vm_bo_add(adev, vm, ctx_data->meta_data_obj); bo_va = amdgpu_vm_bo_add(adev, vm, ctx_data->meta_data_obj);
if (!bo_va) { if (!bo_va) {
ttm_eu_backoff_reservation(&ticket, &list);
DRM_ERROR("failed to create bo_va for meta data BO\n"); DRM_ERROR("failed to create bo_va for meta data BO\n");
return -ENOMEM; r = -ENOMEM;
goto error_fini_exec;
} }
r = amdgpu_vm_bo_map(adev, bo_va, ctx_data->meta_data_gpu_addr, 0, r = amdgpu_vm_bo_map(adev, bo_va, ctx_data->meta_data_gpu_addr, 0,
...@@ -1205,33 +1203,35 @@ int amdgpu_mes_ctx_map_meta_data(struct amdgpu_device *adev, ...@@ -1205,33 +1203,35 @@ int amdgpu_mes_ctx_map_meta_data(struct amdgpu_device *adev,
if (r) { if (r) {
DRM_ERROR("failed to do bo_map on meta data, err=%d\n", r); DRM_ERROR("failed to do bo_map on meta data, err=%d\n", r);
goto error; goto error_del_bo_va;
} }
r = amdgpu_vm_bo_update(adev, bo_va, false); r = amdgpu_vm_bo_update(adev, bo_va, false);
if (r) { if (r) {
DRM_ERROR("failed to do vm_bo_update on meta data\n"); DRM_ERROR("failed to do vm_bo_update on meta data\n");
goto error; goto error_del_bo_va;
} }
amdgpu_sync_fence(&sync, bo_va->last_pt_update); amdgpu_sync_fence(&sync, bo_va->last_pt_update);
r = amdgpu_vm_update_pdes(adev, vm, false); r = amdgpu_vm_update_pdes(adev, vm, false);
if (r) { if (r) {
DRM_ERROR("failed to update pdes on meta data\n"); DRM_ERROR("failed to update pdes on meta data\n");
goto error; goto error_del_bo_va;
} }
amdgpu_sync_fence(&sync, vm->last_update); amdgpu_sync_fence(&sync, vm->last_update);
amdgpu_sync_wait(&sync, false); amdgpu_sync_wait(&sync, false);
ttm_eu_backoff_reservation(&ticket, &list); drm_exec_fini(&exec);
amdgpu_sync_free(&sync); amdgpu_sync_free(&sync);
ctx_data->meta_data_va = bo_va; ctx_data->meta_data_va = bo_va;
return 0; return 0;
error: error_del_bo_va:
amdgpu_vm_bo_del(adev, bo_va); amdgpu_vm_bo_del(adev, bo_va);
ttm_eu_backoff_reservation(&ticket, &list);
error_fini_exec:
drm_exec_fini(&exec);
amdgpu_sync_free(&sync); amdgpu_sync_free(&sync);
return r; return r;
} }
...@@ -1242,34 +1242,30 @@ int amdgpu_mes_ctx_unmap_meta_data(struct amdgpu_device *adev, ...@@ -1242,34 +1242,30 @@ int amdgpu_mes_ctx_unmap_meta_data(struct amdgpu_device *adev,
struct amdgpu_bo_va *bo_va = ctx_data->meta_data_va; struct amdgpu_bo_va *bo_va = ctx_data->meta_data_va;
struct amdgpu_bo *bo = ctx_data->meta_data_obj; struct amdgpu_bo *bo = ctx_data->meta_data_obj;
struct amdgpu_vm *vm = bo_va->base.vm; struct amdgpu_vm *vm = bo_va->base.vm;
struct amdgpu_bo_list_entry vm_pd; struct dma_fence *fence;
struct list_head list, duplicates; struct drm_exec exec;
struct dma_fence *fence = NULL; long r;
struct ttm_validate_buffer tv;
struct ww_acquire_ctx ticket; drm_exec_init(&exec, 0);
long r = 0; drm_exec_until_all_locked(&exec) {
r = drm_exec_lock_obj(&exec,
INIT_LIST_HEAD(&list); &ctx_data->meta_data_obj->tbo.base);
INIT_LIST_HEAD(&duplicates); drm_exec_retry_on_contention(&exec);
if (unlikely(r))
tv.bo = &bo->tbo; goto out_unlock;
tv.num_shared = 2;
list_add(&tv.head, &list); r = amdgpu_vm_lock_pd(vm, &exec, 0);
drm_exec_retry_on_contention(&exec);
amdgpu_vm_get_pd_bo(vm, &list, &vm_pd); if (unlikely(r))
goto out_unlock;
r = ttm_eu_reserve_buffers(&ticket, &list, false, &duplicates);
if (r) {
dev_err(adev->dev, "leaking bo va because "
"we fail to reserve bo (%ld)\n", r);
return r;
} }
amdgpu_vm_bo_del(adev, bo_va); amdgpu_vm_bo_del(adev, bo_va);
if (!amdgpu_vm_ready(vm)) if (!amdgpu_vm_ready(vm))
goto out_unlock; goto out_unlock;
r = dma_resv_get_singleton(bo->tbo.base.resv, DMA_RESV_USAGE_BOOKKEEP, &fence); r = dma_resv_get_singleton(bo->tbo.base.resv, DMA_RESV_USAGE_BOOKKEEP,
&fence);
if (r) if (r)
goto out_unlock; goto out_unlock;
if (fence) { if (fence) {
...@@ -1288,7 +1284,7 @@ int amdgpu_mes_ctx_unmap_meta_data(struct amdgpu_device *adev, ...@@ -1288,7 +1284,7 @@ int amdgpu_mes_ctx_unmap_meta_data(struct amdgpu_device *adev,
out_unlock: out_unlock:
if (unlikely(r < 0)) if (unlikely(r < 0))
dev_err(adev->dev, "failed to clear page tables (%ld)\n", r); dev_err(adev->dev, "failed to clear page tables (%ld)\n", r);
ttm_eu_backoff_reservation(&ticket, &list); drm_exec_fini(&exec);
return r; return r;
} }
......
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