Commit 2b17a3c7 authored by Sowjanya Komatineni's avatar Sowjanya Komatineni Committed by Mark Brown

spi: tegra114: add SPI_LSB_FIRST support

Tegra SPI controller supports lsb first mode. Default is MSB bit first
and on selection of SPI_LSB_FIRST through SPI mode transmission happens
with LSB bit first.

This patch adds SPI_LSB_FIRST flag to mode_bits and also configures it
on request.
Signed-off-by: default avatarSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent fc9ba6e3
...@@ -696,6 +696,11 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device *spi, ...@@ -696,6 +696,11 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device *spi,
else if (req_mode == SPI_MODE_3) else if (req_mode == SPI_MODE_3)
command1 |= SPI_CONTROL_MODE_3; command1 |= SPI_CONTROL_MODE_3;
if (spi->mode & SPI_LSB_FIRST)
command1 |= SPI_LSBIT_FE;
else
command1 &= ~SPI_LSBIT_FE;
if (tspi->cs_control) { if (tspi->cs_control) {
if (tspi->cs_control != spi) if (tspi->cs_control != spi)
tegra_spi_writel(tspi, command1, SPI_COMMAND1); tegra_spi_writel(tspi, command1, SPI_COMMAND1);
...@@ -1047,7 +1052,7 @@ static int tegra_spi_probe(struct platform_device *pdev) ...@@ -1047,7 +1052,7 @@ static int tegra_spi_probe(struct platform_device *pdev)
master->max_speed_hz = 25000000; /* 25MHz */ master->max_speed_hz = 25000000; /* 25MHz */
/* the spi->mode bits understood by this driver: */ /* the spi->mode bits understood by this driver: */
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
master->setup = tegra_spi_setup; master->setup = tegra_spi_setup;
master->transfer_one_message = tegra_spi_transfer_one_message; master->transfer_one_message = tegra_spi_transfer_one_message;
master->num_chipselect = MAX_CHIP_SELECT; master->num_chipselect = MAX_CHIP_SELECT;
......
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