Commit 2b2cb40b authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Felix Fietkau

mt76x0: pci: add hw initialization at bootstrap

Add mt76x0e_register_device routine in pci.c
to initialize the device during hw probe.
Signed-off-by: default avatarLorenzo Bianconi <lorenzo.bianconi@redhat.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent faa605bd
...@@ -107,6 +107,9 @@ static void mt76x0_reset_csr_bbp(struct mt76x0_dev *dev) ...@@ -107,6 +107,9 @@ static void mt76x0_reset_csr_bbp(struct mt76x0_dev *dev)
MT_MAC_SYS_CTRL_RESET_CSR | MT_MAC_SYS_CTRL_RESET_CSR |
MT_MAC_SYS_CTRL_RESET_BBP); MT_MAC_SYS_CTRL_RESET_BBP);
msleep(200); msleep(200);
mt76_clear(dev, MT_MAC_SYS_CTRL,
MT_MAC_SYS_CTRL_RESET_CSR |
MT_MAC_SYS_CTRL_RESET_BBP);
} }
#define RANDOM_WRITE(dev, tab) \ #define RANDOM_WRITE(dev, tab) \
...@@ -152,13 +155,6 @@ static void mt76x0_init_mac_registers(struct mt76x0_dev *dev) ...@@ -152,13 +155,6 @@ static void mt76x0_init_mac_registers(struct mt76x0_dev *dev)
reg &= ~0x3; reg &= ~0x3;
mt76_wr(dev, MT_MAC_SYS_CTRL, reg); mt76_wr(dev, MT_MAC_SYS_CTRL, reg);
if (is_mt7610e(dev)) {
/* Disable COEX_EN */
reg = mt76_rr(dev, MT_COEXCFG0);
reg &= 0xFFFFFFFE;
mt76_wr(dev, MT_COEXCFG0, reg);
}
/* Set 0x141C[15:12]=0xF */ /* Set 0x141C[15:12]=0xF */
reg = mt76_rr(dev, MT_EXT_CCA_CFG); reg = mt76_rr(dev, MT_EXT_CCA_CFG);
reg |= 0x0000F000; reg |= 0x0000F000;
......
...@@ -20,6 +20,51 @@ ...@@ -20,6 +20,51 @@
#include "mt76x0.h" #include "mt76x0.h"
#include "mcu.h" #include "mcu.h"
#include "../mt76x02_dma.h"
static int mt76x0e_register_device(struct mt76x0_dev *dev)
{
int err;
mt76x0_chip_onoff(dev, true, false);
if (!mt76x02_wait_for_mac(&dev->mt76))
return -ETIMEDOUT;
mt76x02_dma_disable(&dev->mt76);
err = mt76x0e_mcu_init(dev);
if (err < 0)
return err;
err = mt76x02_dma_init(&dev->mt76);
if (err < 0)
return err;
err = mt76x0_init_hardware(dev);
if (err < 0)
return err;
if (mt76_chip(&dev->mt76) == 0x7610) {
u16 val;
mt76_clear(dev, MT_COEXCFG0, BIT(0));
val = mt76x02_eeprom_get(&dev->mt76, MT_EE_NIC_CONF_0);
if (val & MT_EE_NIC_CONF_0_PA_IO_CURRENT) {
u32 data;
/* set external external PA I/O
* current to 16mA
*/
data = mt76_rr(dev, 0x11c);
val |= 0xc03;
mt76_wr(dev, 0x11c, val);
}
}
mt76_clear(dev, 0x110, BIT(9));
mt76_set(dev, MT_MAX_LEN_CFG, BIT(13));
return 0;
}
static int static int
mt76x0e_probe(struct pci_dev *pdev, const struct pci_device_id *id) mt76x0e_probe(struct pci_dev *pdev, const struct pci_device_id *id)
...@@ -50,7 +95,7 @@ mt76x0e_probe(struct pci_dev *pdev, const struct pci_device_id *id) ...@@ -50,7 +95,7 @@ mt76x0e_probe(struct pci_dev *pdev, const struct pci_device_id *id)
dev->mt76.rev = mt76_rr(dev, MT_ASIC_VERSION); dev->mt76.rev = mt76_rr(dev, MT_ASIC_VERSION);
dev_info(dev->mt76.dev, "ASIC revision: %08x\n", dev->mt76.rev); dev_info(dev->mt76.dev, "ASIC revision: %08x\n", dev->mt76.rev);
ret = mt76x0e_mcu_init(dev); ret = mt76x0e_register_device(dev);
if (ret < 0) if (ret < 0)
goto error; goto error;
......
...@@ -107,6 +107,7 @@ enum mt76x02_eeprom_field { ...@@ -107,6 +107,7 @@ enum mt76x02_eeprom_field {
#define MT_EE_NIC_CONF_0_PA_TYPE GENMASK(9, 8) #define MT_EE_NIC_CONF_0_PA_TYPE GENMASK(9, 8)
#define MT_EE_NIC_CONF_0_PA_INT_2G BIT(8) #define MT_EE_NIC_CONF_0_PA_INT_2G BIT(8)
#define MT_EE_NIC_CONF_0_PA_INT_5G BIT(9) #define MT_EE_NIC_CONF_0_PA_INT_5G BIT(9)
#define MT_EE_NIC_CONF_0_PA_IO_CURRENT BIT(10)
#define MT_EE_NIC_CONF_0_BOARD_TYPE GENMASK(13, 12) #define MT_EE_NIC_CONF_0_BOARD_TYPE GENMASK(13, 12)
#define MT_EE_NIC_CONF_1_HW_RF_CTRL BIT(0) #define MT_EE_NIC_CONF_1_HW_RF_CTRL BIT(0)
......
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