Commit 2b48b968 authored by Alex Deucher's avatar Alex Deucher

drm/radeon: update wait_for_vblank for r1xx-r4xx

Properly wait for the next vblank region.  The previous
code didn't always wait long enough depending on the timing.
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent f9df7ea3
...@@ -69,6 +69,38 @@ MODULE_FIRMWARE(FIRMWARE_R520); ...@@ -69,6 +69,38 @@ MODULE_FIRMWARE(FIRMWARE_R520);
* and others in some cases. * and others in some cases.
*/ */
static bool r100_is_in_vblank(struct radeon_device *rdev, int crtc)
{
if (crtc == 0) {
if (RREG32(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_CUR)
return true;
else
return false;
} else {
if (RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR)
return true;
else
return false;
}
}
static bool r100_is_counter_moving(struct radeon_device *rdev, int crtc)
{
u32 vline1, vline2;
if (crtc == 0) {
vline1 = (RREG32(RADEON_CRTC_VLINE_CRNT_VLINE) >> 16) & RADEON_CRTC_V_TOTAL;
vline2 = (RREG32(RADEON_CRTC_VLINE_CRNT_VLINE) >> 16) & RADEON_CRTC_V_TOTAL;
} else {
vline1 = (RREG32(RADEON_CRTC2_VLINE_CRNT_VLINE) >> 16) & RADEON_CRTC_V_TOTAL;
vline2 = (RREG32(RADEON_CRTC2_VLINE_CRNT_VLINE) >> 16) & RADEON_CRTC_V_TOTAL;
}
if (vline1 != vline2)
return true;
else
return false;
}
/** /**
* r100_wait_for_vblank - vblank wait asic callback. * r100_wait_for_vblank - vblank wait asic callback.
* *
...@@ -79,36 +111,33 @@ MODULE_FIRMWARE(FIRMWARE_R520); ...@@ -79,36 +111,33 @@ MODULE_FIRMWARE(FIRMWARE_R520);
*/ */
void r100_wait_for_vblank(struct radeon_device *rdev, int crtc) void r100_wait_for_vblank(struct radeon_device *rdev, int crtc)
{ {
int i; unsigned i = 0;
if (crtc >= rdev->num_crtc) if (crtc >= rdev->num_crtc)
return; return;
if (crtc == 0) { if (crtc == 0) {
if (RREG32(RADEON_CRTC_GEN_CNTL) & RADEON_CRTC_EN) { if (!(RREG32(RADEON_CRTC_GEN_CNTL) & RADEON_CRTC_EN))
for (i = 0; i < rdev->usec_timeout; i++) { return;
if (!(RREG32(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_CUR))
break;
udelay(1);
}
for (i = 0; i < rdev->usec_timeout; i++) {
if (RREG32(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_CUR)
break;
udelay(1);
}
}
} else { } else {
if (RREG32(RADEON_CRTC2_GEN_CNTL) & RADEON_CRTC2_EN) { if (!(RREG32(RADEON_CRTC2_GEN_CNTL) & RADEON_CRTC2_EN))
for (i = 0; i < rdev->usec_timeout; i++) { return;
if (!(RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR)) }
break;
udelay(1); /* depending on when we hit vblank, we may be close to active; if so,
} * wait for another frame.
for (i = 0; i < rdev->usec_timeout; i++) { */
if (RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR) while (r100_is_in_vblank(rdev, crtc)) {
break; if (i++ % 100 == 0) {
udelay(1); if (!r100_is_counter_moving(rdev, crtc))
} break;
}
}
while (!r100_is_in_vblank(rdev, crtc)) {
if (i++ % 100 == 0) {
if (!r100_is_counter_moving(rdev, crtc))
break;
} }
} }
} }
......
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