Commit 2b616f86 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson

arm64: dts: qcom: sc7180: rename labels for DSI nodes

Currently in board files MDSS and DSI nodes stay apart, because labels
for DSI nodes do not have the mdss_ prefix. It was found that grouping
all display-related notes is more useful.

To keep all display-related nodes close in the board files, change DSI
node labels from dsi_* to mdss_dsi_*.
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531011623.3808538-8-dmitry.baryshkov@linaro.org
parent 8b764ed0
...@@ -143,21 +143,6 @@ reg_tp_3p3: touchpad-regulator { ...@@ -143,21 +143,6 @@ reg_tp_3p3: touchpad-regulator {
}; };
}; };
&dsi0 {
vdda-supply = <&vreg_l3c_1p2>;
status = "okay";
};
&dsi0_out {
remote-endpoint = <&sn65dsi86_in>;
data-lanes = <0 1 2 3>;
};
&dsi_phy {
vdds-supply = <&vreg_l4a_0p8>;
status = "okay";
};
&i2c2 { &i2c2 {
clock-frequency = <400000>; clock-frequency = <400000>;
status = "okay"; status = "okay";
...@@ -269,7 +254,7 @@ port@0 { ...@@ -269,7 +254,7 @@ port@0 {
reg = <0>; reg = <0>;
sn65dsi86_in: endpoint { sn65dsi86_in: endpoint {
remote-endpoint = <&dsi0_out>; remote-endpoint = <&mdss_dsi0_out>;
}; };
}; };
...@@ -313,6 +298,21 @@ &mdss { ...@@ -313,6 +298,21 @@ &mdss {
status = "okay"; status = "okay";
}; };
&mdss_dsi0 {
vdda-supply = <&vreg_l3c_1p2>;
status = "okay";
};
&mdss_dsi0_out {
remote-endpoint = <&sn65dsi86_in>;
data-lanes = <0 1 2 3>;
};
&mdss_dsi0_phy {
vdds-supply = <&vreg_l4a_0p8>;
status = "okay";
};
&pm6150_adc { &pm6150_adc {
thermistor@4e { thermistor@4e {
reg = <ADC5_AMUX_THM2_100K_PU>; reg = <ADC5_AMUX_THM2_100K_PU>;
......
...@@ -295,7 +295,11 @@ vreg_bob: bob { ...@@ -295,7 +295,11 @@ vreg_bob: bob {
}; };
}; };
&dsi0 { &mdss {
status = "okay";
};
&mdss_dsi0 {
status = "okay"; status = "okay";
vdda-supply = <&vreg_l3c_1p2>; vdda-supply = <&vreg_l3c_1p2>;
...@@ -314,7 +318,7 @@ panel@0 { ...@@ -314,7 +318,7 @@ panel@0 {
port { port {
panel0_in: endpoint { panel0_in: endpoint {
remote-endpoint = <&dsi0_out>; remote-endpoint = <&mdss_dsi0_out>;
}; };
}; };
}; };
...@@ -329,15 +333,11 @@ endpoint { ...@@ -329,15 +333,11 @@ endpoint {
}; };
}; };
&dsi_phy { &mdss_dsi0_phy {
status = "okay"; status = "okay";
vdds-supply = <&vreg_l4a_0p8>; vdds-supply = <&vreg_l4a_0p8>;
}; };
&mdss {
status = "okay";
};
&qfprom { &qfprom {
vcc-supply = <&vreg_l11a_1p8>; vcc-supply = <&vreg_l11a_1p8>;
}; };
......
...@@ -46,10 +46,6 @@ &pp3300_dx_edp { ...@@ -46,10 +46,6 @@ &pp3300_dx_edp {
/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
&dsi0_out {
remote-endpoint = <&ps8640_in>;
};
edp_brij_i2c: &i2c2 { edp_brij_i2c: &i2c2 {
status = "okay"; status = "okay";
clock-frequency = <400000>; clock-frequency = <400000>;
...@@ -74,7 +70,7 @@ ports { ...@@ -74,7 +70,7 @@ ports {
port@0 { port@0 {
reg = <0>; reg = <0>;
ps8640_in: endpoint { ps8640_in: endpoint {
remote-endpoint = <&dsi0_out>; remote-endpoint = <&mdss_dsi0_out>;
}; };
}; };
...@@ -102,6 +98,10 @@ panel_in_edp: endpoint { ...@@ -102,6 +98,10 @@ panel_in_edp: endpoint {
}; };
}; };
&mdss_dsi0_out {
remote-endpoint = <&ps8640_in>;
};
&tlmm { &tlmm {
edp_brij_ps8640_rst: edp-brij-ps8640-rst-state { edp_brij_ps8640_rst: edp-brij-ps8640-rst-state {
pins = "gpio11"; pins = "gpio11";
......
...@@ -15,7 +15,7 @@ / { ...@@ -15,7 +15,7 @@ / {
compatible = "google,quackingstick-sku1537", "qcom,sc7180"; compatible = "google,quackingstick-sku1537", "qcom,sc7180";
}; };
&dsi_phy { &mdss_dsi0_phy {
qcom,phy-rescode-offset-top = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>; qcom,phy-rescode-offset-top = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>;
qcom,phy-rescode-offset-bot = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>; qcom,phy-rescode-offset-bot = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>;
qcom,phy-drive-ldo-level = <375>; qcom,phy-drive-ldo-level = <375>;
......
...@@ -52,7 +52,31 @@ keyboard-controller { ...@@ -52,7 +52,31 @@ keyboard-controller {
}; };
}; };
&dsi0 { &gpio_keys {
status = "okay";
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
ap_ts: touchscreen@10 {
compatible = "hid-over-i2c";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
post-power-on-delay-ms = <20>;
hid-descr-addr = <0x0001>;
vdd-supply = <&pp3300_ts>;
};
};
&mdss_dsi0 {
panel: panel@0 { panel: panel@0 {
/* Compatible will be filled in per-board */ /* Compatible will be filled in per-board */
reg = <0>; reg = <0>;
...@@ -67,7 +91,7 @@ panel: panel@0 { ...@@ -67,7 +91,7 @@ panel: panel@0 {
port { port {
panel_in: endpoint { panel_in: endpoint {
remote-endpoint = <&dsi0_out>; remote-endpoint = <&mdss_dsi0_out>;
}; };
}; };
}; };
...@@ -82,30 +106,6 @@ endpoint { ...@@ -82,30 +106,6 @@ endpoint {
}; };
}; };
&gpio_keys {
status = "okay";
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
ap_ts: touchscreen@10 {
compatible = "hid-over-i2c";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
post-power-on-delay-ms = <20>;
hid-descr-addr = <0x0001>;
vdd-supply = <&pp3300_ts>;
};
};
&sdhc_2 { &sdhc_2 {
status = "okay"; status = "okay";
}; };
......
...@@ -27,10 +27,6 @@ &pp3300_dx_edp { ...@@ -27,10 +27,6 @@ &pp3300_dx_edp {
/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
&dsi0_out {
remote-endpoint = <&sn65dsi86_in>;
};
edp_brij_i2c: &i2c2 { edp_brij_i2c: &i2c2 {
status = "okay"; status = "okay";
clock-frequency = <400000>; clock-frequency = <400000>;
...@@ -65,7 +61,7 @@ ports { ...@@ -65,7 +61,7 @@ ports {
port@0 { port@0 {
reg = <0>; reg = <0>;
sn65dsi86_in: endpoint { sn65dsi86_in: endpoint {
remote-endpoint = <&dsi0_out>; remote-endpoint = <&mdss_dsi0_out>;
}; };
}; };
...@@ -95,6 +91,10 @@ panel_in_edp: endpoint { ...@@ -95,6 +91,10 @@ panel_in_edp: endpoint {
}; };
}; };
&mdss_dsi0_out {
remote-endpoint = <&sn65dsi86_in>;
};
&tlmm { &tlmm {
edp_brij_irq: edp-brij-irq-state { edp_brij_irq: edp-brij-irq-state {
pins = "gpio11"; pins = "gpio11";
......
...@@ -17,7 +17,7 @@ / { ...@@ -17,7 +17,7 @@ / {
compatible = "google,wormdingler-sku1024", "qcom,sc7180"; compatible = "google,wormdingler-sku1024", "qcom,sc7180";
}; };
&dsi_phy { &mdss_dsi0_phy {
qcom,phy-rescode-offset-top = /bits/ 8 <31 31 31 31 (-32)>; qcom,phy-rescode-offset-top = /bits/ 8 <31 31 31 31 (-32)>;
qcom,phy-rescode-offset-bot = /bits/ 8 <31 31 31 31 (-32)>; qcom,phy-rescode-offset-bot = /bits/ 8 <31 31 31 31 (-32)>;
qcom,phy-drive-ldo-level = <450>; qcom,phy-drive-ldo-level = <450>;
......
...@@ -110,7 +110,28 @@ keyboard-controller { ...@@ -110,7 +110,28 @@ keyboard-controller {
}; };
}; };
&dsi0 { &i2c4 {
status = "okay";
clock-frequency = <400000>;
ap_ts: touchscreen@1 {
compatible = "hid-over-i2c";
reg = <0x01>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
post-power-on-delay-ms = <70>;
hid-descr-addr = <0x0001>;
vdd-supply = <&pp3300_ts>;
vddl-supply = <&pp1800_ts>;
};
};
&mdss_dsi0 {
panel: panel@0 { panel: panel@0 {
reg = <0>; reg = <0>;
...@@ -126,7 +147,7 @@ panel: panel@0 { ...@@ -126,7 +147,7 @@ panel: panel@0 {
port { port {
panel_in: endpoint { panel_in: endpoint {
remote-endpoint = <&dsi0_out>; remote-endpoint = <&mdss_dsi0_out>;
}; };
}; };
}; };
...@@ -141,27 +162,6 @@ endpoint { ...@@ -141,27 +162,6 @@ endpoint {
}; };
}; };
&i2c4 {
status = "okay";
clock-frequency = <400000>;
ap_ts: touchscreen@1 {
compatible = "hid-over-i2c";
reg = <0x01>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
post-power-on-delay-ms = <70>;
hid-descr-addr = <0x0001>;
vdd-supply = <&pp3300_ts>;
vddl-supply = <&pp1800_ts>;
};
};
&pm6150_adc { &pm6150_adc {
skin-temp-thermistor@4d { skin-temp-thermistor@4d {
reg = <ADC5_AMUX_THM1_100K_PU>; reg = <ADC5_AMUX_THM1_100K_PU>;
......
...@@ -705,20 +705,6 @@ &camcc { ...@@ -705,20 +705,6 @@ &camcc {
status = "disabled"; status = "disabled";
}; };
&dsi0 {
status = "okay";
vdda-supply = <&vdda_mipi_dsi0_1p2>;
};
&dsi0_out {
data-lanes = <0 1 2 3>;
};
&dsi_phy {
status = "okay";
vdds-supply = <&vdda_mipi_dsi0_pll>;
};
ap_sar_sensor_i2c: &i2c5 { ap_sar_sensor_i2c: &i2c5 {
clock-frequency = <400000>; clock-frequency = <400000>;
...@@ -836,6 +822,20 @@ &mdss_dp_out { ...@@ -836,6 +822,20 @@ &mdss_dp_out {
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000>; link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000>;
}; };
&mdss_dsi0 {
status = "okay";
vdda-supply = <&vdda_mipi_dsi0_1p2>;
};
&mdss_dsi0_out {
data-lanes = <0 1 2 3>;
};
&mdss_dsi0_phy {
status = "okay";
vdds-supply = <&vdda_mipi_dsi0_pll>;
};
&pm6150_adc { &pm6150_adc {
charger-thermistor@4f { charger-thermistor@4f {
reg = <ADC5_AMUX_THM3_100K_PU>; reg = <ADC5_AMUX_THM3_100K_PU>;
......
...@@ -2996,7 +2996,7 @@ ports { ...@@ -2996,7 +2996,7 @@ ports {
port@0 { port@0 {
reg = <0>; reg = <0>;
dpu_intf1_out: endpoint { dpu_intf1_out: endpoint {
remote-endpoint = <&dsi0_in>; remote-endpoint = <&mdss_dsi0_in>;
}; };
}; };
...@@ -3033,7 +3033,7 @@ opp-460000000 { ...@@ -3033,7 +3033,7 @@ opp-460000000 {
}; };
}; };
dsi0: dsi@ae94000 { mdss_dsi0: dsi@ae94000 {
compatible = "qcom,sc7180-dsi-ctrl", compatible = "qcom,sc7180-dsi-ctrl",
"qcom,mdss-dsi-ctrl"; "qcom,mdss-dsi-ctrl";
reg = <0 0x0ae94000 0 0x400>; reg = <0 0x0ae94000 0 0x400>;
...@@ -3056,12 +3056,12 @@ dsi0: dsi@ae94000 { ...@@ -3056,12 +3056,12 @@ dsi0: dsi@ae94000 {
"bus"; "bus";
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>; assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
operating-points-v2 = <&dsi_opp_table>; operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmhpd SC7180_CX>; power-domains = <&rpmhpd SC7180_CX>;
phys = <&dsi_phy>; phys = <&mdss_dsi0_phy>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -3074,14 +3074,14 @@ ports { ...@@ -3074,14 +3074,14 @@ ports {
port@0 { port@0 {
reg = <0>; reg = <0>;
dsi0_in: endpoint { mdss_dsi0_in: endpoint {
remote-endpoint = <&dpu_intf1_out>; remote-endpoint = <&dpu_intf1_out>;
}; };
}; };
port@1 { port@1 {
reg = <1>; reg = <1>;
dsi0_out: endpoint { mdss_dsi0_out: endpoint {
}; };
}; };
}; };
...@@ -3106,13 +3106,13 @@ opp-358000000 { ...@@ -3106,13 +3106,13 @@ opp-358000000 {
}; };
}; };
dsi_phy: phy@ae94400 { mdss_dsi0_phy: phy@ae94400 {
compatible = "qcom,dsi-phy-10nm"; compatible = "qcom,dsi-phy-10nm";
reg = <0 0x0ae94400 0 0x200>, reg = <0 0x0ae94400 0 0x200>,
<0 0x0ae94600 0 0x280>, <0 0x0ae94600 0 0x280>,
<0 0x0ae94a00 0 0x1e0>; <0 0x0ae94a00 0 0x1e0>;
reg-names = "dsi_phy", reg-names = "dsi0_phy",
"dsi_phy_lane", "dsi0_phy_lane",
"dsi_pll"; "dsi_pll";
#clock-cells = <1>; #clock-cells = <1>;
...@@ -3203,8 +3203,8 @@ dispcc: clock-controller@af00000 { ...@@ -3203,8 +3203,8 @@ dispcc: clock-controller@af00000 {
reg = <0 0x0af00000 0 0x200000>; reg = <0 0x0af00000 0 0x200000>;
clocks = <&rpmhcc RPMH_CXO_CLK>, clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_DISP_GPLL0_CLK_SRC>, <&gcc GCC_DISP_GPLL0_CLK_SRC>,
<&dsi_phy 0>, <&mdss_dsi0_phy 0>,
<&dsi_phy 1>, <&mdss_dsi0_phy 1>,
<&dp_phy 0>, <&dp_phy 0>,
<&dp_phy 1>; <&dp_phy 1>;
clock-names = "bi_tcxo", clock-names = "bi_tcxo",
......
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