Commit 2b87f3b1 authored by Jesse Barnes's avatar Jesse Barnes Committed by Daniel Vetter

drm/i915: fix Haswell pfit power well check v2

We can't read the pfit regs if the power well is off, so use the cached
value.

v2: re-add lost comment (Jesse)
    make sure the crtc using the fitter is actually enabled (Jesse)
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
[danvet: Drop now unused dev_priv, as spotted by Mika.]
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 168f8366
......@@ -5906,7 +5906,6 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
static void haswell_modeset_global_resources(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
bool enable = false;
struct intel_crtc *crtc;
struct intel_encoder *encoder;
......@@ -5918,7 +5917,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
* sequence that's not yet available. Just in case desktop eDP
* on PORT D is possible on haswell, too. */
/* Even the eDP panel fitter is outside the always-on well. */
if (I915_READ(PF_WIN_SZ(crtc->pipe)))
if (crtc->config.pch_pfit.size && crtc->base.enabled)
enable = true;
}
......
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