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Commit 2bc88b1b authored by Huang Shijie's avatar Huang Shijie Committed by Shawn Guo
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ARM: dts: vf610: use the interrupt macros 

This patch uses the IRQ_TYPE_LEVEL_HIGH/IRQ_TYPE_NONE to replace
the hardcode.

[shawn.guo: While at it, we also fix the typo in uart0 interrupts
property, where the 0x00 should 0x04.  Hense, it should also be
IRQ_TYPE_LEVEL_HIGH just like other UART instances.]
Signed-off-by: default avatarHuang Shijie <b32955@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 4e05a7af
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Inline Side-by-side
Showing with 19 additions and 18 deletions
arch/arm/boot/dts/vf610.dtsi
View file @ 2bc88b1b
...@@ -10,6 +10,7 @@ ...@@ -10,6 +10,7 @@
#include "skeleton.dtsi" #include "skeleton.dtsi"
#include "vf610-pinfunc.h" #include "vf610-pinfunc.h"
#include <dt-bindings/clock/vf610-clock.h> #include <dt-bindings/clock/vf610-clock.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ { / {
aliases { aliases {
...@@ -90,7 +91,7 @@ L2: l2-cache@40006000 { ...@@ -90,7 +91,7 @@ L2: l2-cache@40006000 {
uart0: serial@40027000 { uart0: serial@40027000 {
compatible = "fsl,vf610-lpuart"; compatible = "fsl,vf610-lpuart";
reg = <0x40027000 0x1000>; reg = <0x40027000 0x1000>;
interrupts = <0 61 0x00>; interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_UART0>; clocks = <&clks VF610_CLK_UART0>;
clock-names = "ipg"; clock-names = "ipg";
status = "disabled"; status = "disabled";
...@@ -99,7 +100,7 @@ uart0: serial@40027000 { ...@@ -99,7 +100,7 @@ uart0: serial@40027000 {
uart1: serial@40028000 { uart1: serial@40028000 {
compatible = "fsl,vf610-lpuart"; compatible = "fsl,vf610-lpuart";
reg = <0x40028000 0x1000>; reg = <0x40028000 0x1000>;
interrupts = <0 62 0x04>; interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_UART1>; clocks = <&clks VF610_CLK_UART1>;
clock-names = "ipg"; clock-names = "ipg";
status = "disabled"; status = "disabled";
...@@ -108,7 +109,7 @@ uart1: serial@40028000 { ...@@ -108,7 +109,7 @@ uart1: serial@40028000 {
uart2: serial@40029000 { uart2: serial@40029000 {
compatible = "fsl,vf610-lpuart"; compatible = "fsl,vf610-lpuart";
reg = <0x40029000 0x1000>; reg = <0x40029000 0x1000>;
interrupts = <0 63 0x04>; interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_UART2>; clocks = <&clks VF610_CLK_UART2>;
clock-names = "ipg"; clock-names = "ipg";
status = "disabled"; status = "disabled";
...@@ -117,7 +118,7 @@ uart2: serial@40029000 { ...@@ -117,7 +118,7 @@ uart2: serial@40029000 {
uart3: serial@4002a000 { uart3: serial@4002a000 {
compatible = "fsl,vf610-lpuart"; compatible = "fsl,vf610-lpuart";
reg = <0x4002a000 0x1000>; reg = <0x4002a000 0x1000>;
interrupts = <0 64 0x04>; interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_UART3>; clocks = <&clks VF610_CLK_UART3>;
clock-names = "ipg"; clock-names = "ipg";
status = "disabled"; status = "disabled";
...@@ -128,7 +129,7 @@ dspi0: dspi0@4002c000 { ...@@ -128,7 +129,7 @@ dspi0: dspi0@4002c000 {
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,vf610-dspi"; compatible = "fsl,vf610-dspi";
reg = <0x4002c000 0x1000>; reg = <0x4002c000 0x1000>;
interrupts = <0 67 0x04>; interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_DSPI0>; clocks = <&clks VF610_CLK_DSPI0>;
clock-names = "dspi"; clock-names = "dspi";
spi-num-chipselects = <5>; spi-num-chipselects = <5>;
...@@ -138,7 +139,7 @@ dspi0: dspi0@4002c000 { ...@@ -138,7 +139,7 @@ dspi0: dspi0@4002c000 {
sai2: sai@40031000 { sai2: sai@40031000 {
compatible = "fsl,vf610-sai"; compatible = "fsl,vf610-sai";
reg = <0x40031000 0x1000>; reg = <0x40031000 0x1000>;
interrupts = <0 86 0x04>; interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_SAI2>; clocks = <&clks VF610_CLK_SAI2>;
clock-names = "sai"; clock-names = "sai";
status = "disabled"; status = "disabled";
...@@ -147,7 +148,7 @@ sai2: sai@40031000 { ...@@ -147,7 +148,7 @@ sai2: sai@40031000 {
pit: pit@40037000 { pit: pit@40037000 {
compatible = "fsl,vf610-pit"; compatible = "fsl,vf610-pit";
reg = <0x40037000 0x1000>; reg = <0x40037000 0x1000>;
interrupts = <0 39 0x04>; interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_PIT>; clocks = <&clks VF610_CLK_PIT>;
clock-names = "pit"; clock-names = "pit";
}; };
...@@ -164,7 +165,7 @@ qspi0: quadspi@40044000 { ...@@ -164,7 +165,7 @@ qspi0: quadspi@40044000 {
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,vf610-qspi"; compatible = "fsl,vf610-qspi";
reg = <0x40044000 0x1000>; reg = <0x40044000 0x1000>;
interrupts = <0 24 0x04>; interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_QSPI0_EN>, clocks = <&clks VF610_CLK_QSPI0_EN>,
<&clks VF610_CLK_QSPI0>; <&clks VF610_CLK_QSPI0>;
clock-names = "qspi_en", "qspi"; clock-names = "qspi_en", "qspi";
...@@ -180,7 +181,7 @@ iomuxc: iomuxc@40048000 { ...@@ -180,7 +181,7 @@ iomuxc: iomuxc@40048000 {
gpio1: gpio@40049000 { gpio1: gpio@40049000 {
compatible = "fsl,vf610-gpio"; compatible = "fsl,vf610-gpio";
reg = <0x40049000 0x1000 0x400ff000 0x40>; reg = <0x40049000 0x1000 0x400ff000 0x40>;
interrupts = <0 107 0x04>; interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -191,7 +192,7 @@ gpio1: gpio@40049000 { ...@@ -191,7 +192,7 @@ gpio1: gpio@40049000 {
gpio2: gpio@4004a000 { gpio2: gpio@4004a000 {
compatible = "fsl,vf610-gpio"; compatible = "fsl,vf610-gpio";
reg = <0x4004a000 0x1000 0x400ff040 0x40>; reg = <0x4004a000 0x1000 0x400ff040 0x40>;
interrupts = <0 108 0x04>; interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -202,7 +203,7 @@ gpio2: gpio@4004a000 { ...@@ -202,7 +203,7 @@ gpio2: gpio@4004a000 {
gpio3: gpio@4004b000 { gpio3: gpio@4004b000 {
compatible = "fsl,vf610-gpio"; compatible = "fsl,vf610-gpio";
reg = <0x4004b000 0x1000 0x400ff080 0x40>; reg = <0x4004b000 0x1000 0x400ff080 0x40>;
interrupts = <0 109 0x04>; interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -213,7 +214,7 @@ gpio3: gpio@4004b000 { ...@@ -213,7 +214,7 @@ gpio3: gpio@4004b000 {
gpio4: gpio@4004c000 { gpio4: gpio@4004c000 {
compatible = "fsl,vf610-gpio"; compatible = "fsl,vf610-gpio";
reg = <0x4004c000 0x1000 0x400ff0c0 0x40>; reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
interrupts = <0 110 0x04>; interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -224,7 +225,7 @@ gpio4: gpio@4004c000 { ...@@ -224,7 +225,7 @@ gpio4: gpio@4004c000 {
gpio5: gpio@4004d000 { gpio5: gpio@4004d000 {
compatible = "fsl,vf610-gpio"; compatible = "fsl,vf610-gpio";
reg = <0x4004d000 0x1000 0x400ff100 0x40>; reg = <0x4004d000 0x1000 0x400ff100 0x40>;
interrupts = <0 111 0x04>; interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -242,7 +243,7 @@ i2c0: i2c@40066000 { ...@@ -242,7 +243,7 @@ i2c0: i2c@40066000 {
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,vf610-i2c"; compatible = "fsl,vf610-i2c";
reg = <0x40066000 0x1000>; reg = <0x40066000 0x1000>;
interrupts =<0 71 0x04>; interrupts =<0 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_I2C0>; clocks = <&clks VF610_CLK_I2C0>;
clock-names = "ipg"; clock-names = "ipg";
status = "disabled"; status = "disabled";
...@@ -265,7 +266,7 @@ aips1: aips-bus@40080000 { ...@@ -265,7 +266,7 @@ aips1: aips-bus@40080000 {
uart4: serial@400a9000 { uart4: serial@400a9000 {
compatible = "fsl,vf610-lpuart"; compatible = "fsl,vf610-lpuart";
reg = <0x400a9000 0x1000>; reg = <0x400a9000 0x1000>;
interrupts = <0 65 0x04>; interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_UART4>; clocks = <&clks VF610_CLK_UART4>;
clock-names = "ipg"; clock-names = "ipg";
status = "disabled"; status = "disabled";
...@@ -274,7 +275,7 @@ uart4: serial@400a9000 { ...@@ -274,7 +275,7 @@ uart4: serial@400a9000 {
uart5: serial@400aa000 { uart5: serial@400aa000 {
compatible = "fsl,vf610-lpuart"; compatible = "fsl,vf610-lpuart";
reg = <0x400aa000 0x1000>; reg = <0x400aa000 0x1000>;
interrupts = <0 66 0x04>; interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_UART5>; clocks = <&clks VF610_CLK_UART5>;
clock-names = "ipg"; clock-names = "ipg";
status = "disabled"; status = "disabled";
...@@ -283,7 +284,7 @@ uart5: serial@400aa000 { ...@@ -283,7 +284,7 @@ uart5: serial@400aa000 {
fec0: ethernet@400d0000 { fec0: ethernet@400d0000 {
compatible = "fsl,mvf600-fec"; compatible = "fsl,mvf600-fec";
reg = <0x400d0000 0x1000>; reg = <0x400d0000 0x1000>;
interrupts = <0 78 0x04>; interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_ENET0>, clocks = <&clks VF610_CLK_ENET0>,
<&clks VF610_CLK_ENET0>, <&clks VF610_CLK_ENET0>,
<&clks VF610_CLK_ENET>; <&clks VF610_CLK_ENET>;
...@@ -294,7 +295,7 @@ fec0: ethernet@400d0000 { ...@@ -294,7 +295,7 @@ fec0: ethernet@400d0000 {
fec1: ethernet@400d1000 { fec1: ethernet@400d1000 {
compatible = "fsl,mvf600-fec"; compatible = "fsl,mvf600-fec";
reg = <0x400d1000 0x1000>; reg = <0x400d1000 0x1000>;
interrupts = <0 79 0x04>; interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_ENET1>, clocks = <&clks VF610_CLK_ENET1>,
<&clks VF610_CLK_ENET1>, <&clks VF610_CLK_ENET1>,
<&clks VF610_CLK_ENET>; <&clks VF610_CLK_ENET>;
......
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