Commit 2e3d256d authored by Hans J. Koch's avatar Hans J. Koch

arm: Remove plat-tcc directory

The Telechips ARM architecture is being removed. This patch
deletes the arch/arm/plat-tcc/ folder.

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Harry Sievers <hsievers@csselectronic.com>
Signed-off-by: default avatarHans J. Koch <hjk@hansjkoch.de>
parent 00d79e9d
if ARCH_TCC_926
menu "Telechips ARM926-based CPUs"
choice
prompt "Telechips CPU type:"
default ARCH_TCC8K
config ARCH_TCC8K
bool TCC8000
select USB_ARCH_HAS_OHCI
help
Support for Telechips TCC8000 systems
endchoice
source "arch/arm/mach-tcc8k/Kconfig"
endmenu
endif
# "Telechips Platform Common Modules"
obj-y := clock.o system.o
/*
* Clock framework for Telechips SoCs
* Based on arch/arm/plat-mxc/clock.c
*
* Copyright (C) 2004 - 2005 Nokia corporation
* Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
* Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
* Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
* Copyright 2010 Hans J. Koch, hjk@linutronix.de
*
* Licensed under the terms of the GPL v2.
*/
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/string.h>
#include <mach/clock.h>
#include <mach/hardware.h>
static DEFINE_MUTEX(clocks_mutex);
/*-------------------------------------------------------------------------
* Standard clock functions defined in include/linux/clk.h
*-------------------------------------------------------------------------*/
static void __clk_disable(struct clk *clk)
{
BUG_ON(clk->refcount == 0);
if (!(--clk->refcount) && clk->disable) {
/* Unconditionally disable the clock in hardware */
clk->disable(clk);
/* recursively disable parents */
if (clk->parent)
__clk_disable(clk->parent);
}
}
static int __clk_enable(struct clk *clk)
{
int ret = 0;
if (clk->refcount++ == 0 && clk->enable) {
if (clk->parent)
ret = __clk_enable(clk->parent);
if (ret)
return ret;
else
return clk->enable(clk);
}
return 0;
}
/* This function increments the reference count on the clock and enables the
* clock if not already enabled. The parent clock tree is recursively enabled
*/
int clk_enable(struct clk *clk)
{
int ret = 0;
if (!clk)
return -EINVAL;
mutex_lock(&clocks_mutex);
ret = __clk_enable(clk);
mutex_unlock(&clocks_mutex);
return ret;
}
EXPORT_SYMBOL_GPL(clk_enable);
/* This function decrements the reference count on the clock and disables
* the clock when reference count is 0. The parent clock tree is
* recursively disabled
*/
void clk_disable(struct clk *clk)
{
if (!clk)
return;
mutex_lock(&clocks_mutex);
__clk_disable(clk);
mutex_unlock(&clocks_mutex);
}
EXPORT_SYMBOL_GPL(clk_disable);
/* Retrieve the *current* clock rate. If the clock itself
* does not provide a special calculation routine, ask
* its parent and so on, until one is able to return
* a valid clock rate
*/
unsigned long clk_get_rate(struct clk *clk)
{
if (!clk)
return 0UL;
if (clk->get_rate)
return clk->get_rate(clk);
return clk_get_rate(clk->parent);
}
EXPORT_SYMBOL_GPL(clk_get_rate);
/* Round the requested clock rate to the nearest supported
* rate that is less than or equal to the requested rate.
* This is dependent on the clock's current parent.
*/
long clk_round_rate(struct clk *clk, unsigned long rate)
{
if (!clk)
return 0;
if (!clk->round_rate)
return 0;
return clk->round_rate(clk, rate);
}
EXPORT_SYMBOL_GPL(clk_round_rate);
/* Set the clock to the requested clock rate. The rate must
* match a supported rate exactly based on what clk_round_rate returns
*/
int clk_set_rate(struct clk *clk, unsigned long rate)
{
int ret = -EINVAL;
if (!clk)
return ret;
if (!clk->set_rate || !rate)
return ret;
mutex_lock(&clocks_mutex);
ret = clk->set_rate(clk, rate);
mutex_unlock(&clocks_mutex);
return ret;
}
EXPORT_SYMBOL_GPL(clk_set_rate);
/* Set the clock's parent to another clock source */
int clk_set_parent(struct clk *clk, struct clk *parent)
{
struct clk *old;
int ret = -EINVAL;
if (!clk)
return ret;
if (!clk->set_parent || !parent)
return ret;
mutex_lock(&clocks_mutex);
old = clk->parent;
if (clk->refcount)
__clk_enable(parent);
ret = clk->set_parent(clk, parent);
if (ret)
old = parent;
if (clk->refcount)
__clk_disable(old);
mutex_unlock(&clocks_mutex);
return ret;
}
EXPORT_SYMBOL_GPL(clk_set_parent);
/* Retrieve the clock's parent clock source */
struct clk *clk_get_parent(struct clk *clk)
{
if (!clk)
return NULL;
return clk->parent;
}
EXPORT_SYMBOL_GPL(clk_get_parent);
/*
* Low level clock header file for Telechips TCC architecture
* (C) 2010 Hans J. Koch <hjk@linutronix.de>
*
* Licensed under the GPL v2.
*/
#ifndef __ASM_ARCH_TCC_CLOCK_H__
#define __ASM_ARCH_TCC_CLOCK_H__
#ifndef __ASSEMBLY__
struct clk {
struct clk *parent;
/* id number of a root clock, 0 for normal clocks */
int root_id;
/* Reference count of clock enable/disable */
int refcount;
/* Address of associated BCLKCTRx register. Must be set. */
void __iomem *bclkctr;
/* Bit position for BCLKCTRx. Must be set. */
int bclk_shift;
/* Address of ACLKxxx register, if any. */
void __iomem *aclkreg;
/* get the current clock rate (always a fresh value) */
unsigned long (*get_rate) (struct clk *);
/* Function ptr to set the clock to a new rate. The rate must match a
supported rate returned from round_rate. Leave blank if clock is not
programmable */
int (*set_rate) (struct clk *, unsigned long);
/* Function ptr to round the requested clock rate to the nearest
supported rate that is less than or equal to the requested rate. */
unsigned long (*round_rate) (struct clk *, unsigned long);
/* Function ptr to enable the clock. Leave blank if clock can not
be gated. */
int (*enable) (struct clk *);
/* Function ptr to disable the clock. Leave blank if clock can not
be gated. */
void (*disable) (struct clk *);
/* Function ptr to set the parent clock of the clock. */
int (*set_parent) (struct clk *, struct clk *);
};
int clk_register(struct clk *clk);
void clk_unregister(struct clk *clk);
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARCH_MXC_CLOCK_H__ */
/*
* Copyright (C) 1994-1999 Russell King
* Copyright (C) 2008-2009 Telechips
* Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
.macro addruart, rp, rv, tmp
moveq \rp, #0x90000000 @ physical base address
movne \rv, #0xF1000000 @ virtual base
orr \rp, \rp, #0x00007000 @ UART0
orr \rv, \rv, #0x00007000 @ UART0
.endm
.macro senduart,rd,rx
strb \rd, [\rx, #0x44]
.endm
.macro waituart,rd,rx
.endm
.macro busyuart,rd,rx
1001:
ldr \rd, [\rx, #0x14]
tst \rd, #0x20
beq 1001b
.endm
/*
* include/asm-arm/arch-tcc83x/entry-macro.S
*
* Author : <linux@telechips.com>
* Created: June 10, 2008
* Description: Low-level IRQ helper macros for Telechips-based platforms
*
* Copyright (C) 2008-2009 Telechips
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <mach/hardware.h>
#include <mach/irqs.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =0xF2003000 @ base address of PIC registers
@@ read MREQ register of PIC0
mov \irqnr, #0
ldr \irqstat, [\base, #0x00000014 ] @ lower 32 interrupts
cmp \irqstat, #0
bne 1001f
@@ read MREQ register of PIC1
ldr \irqstat, [\base, #0x00000094] @ upper 32 interrupts
cmp \irqstat, #0
beq 1002f
mov \irqnr, #0x20
1001:
movs \tmp, \irqstat, lsl #16
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #16
movs \tmp, \irqstat, lsl #8
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #8
movs \tmp, \irqstat, lsl #4
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #4
movs \tmp, \irqstat, lsl #2
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #2
movs \tmp, \irqstat, lsl #1
addeq \irqnr, \irqnr, #1
orrs \base, \base, #1
1002:
@@ exit here, Z flag unset if IRQ
.endm
/*
* Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
* Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
* and Dirk Behme <dirk.behme@de.bosch.com>
* Rewritten by: <linux@telechips.com>
* Description: Hardware definitions for TCC8300 processors and boards
*
* Copyright (C) 2001 RidgeRun, Inc.
* Copyright (C) 2008-2009 Telechips
*
* Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de>
*
* Licensed under the terms of the GNU Pulic License version 2.
*/
#ifndef __ASM_ARCH_TCC_HARDWARE_H
#define __ASM_ARCH_TCC_HARDWARE_H
#include <asm/sizes.h>
#ifndef __ASSEMBLER__
#include <asm/types.h>
#endif
#include <mach/io.h>
/*
* ----------------------------------------------------------------------------
* Clocks
* ----------------------------------------------------------------------------
*/
#define CLKGEN_REG_BASE 0xfffece00
#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0)
#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4)
#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8)
#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC)
#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10)
#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14)
#define ARM_SYSST (CLKGEN_REG_BASE + 0x18)
#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
/* DPLL control registers */
#define DPLL_CTL 0xfffecf00
#endif /* __ASM_ARCH_TCC_HARDWARE_H */
/*
* IO definitions for TCC8000 processors and boards
*
* Copyright (C) 1997-1999 Russell King
* Copyright (C) 2008-2009 Telechips
* Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de>
*
* Licensed under the terms of the GNU Public License version 2.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
/*
* IRQ definitions for TCC8xxx
*
* Copyright (C) 2008-2009 Telechips
* Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
*
* Licensed under the terms of the GPL v2.
*
*/
#ifndef __ASM_ARCH_TCC_IRQS_H
#define __ASM_ARCH_TCC_IRQS_H
#define NR_IRQS 64
/* PIC0 interrupts */
#define INT_ADMA1 0
#define INT_BDMA 1
#define INT_ADMA0 2
#define INT_GDMA1 3
#define INT_I2S0RX 4
#define INT_I2S0TX 5
#define INT_TC 6
#define INT_UART0 7
#define INT_USBD 8
#define INT_SPI0TX 9
#define INT_UDMA 10
#define INT_LIRQ 11
#define INT_GDMA2 12
#define INT_GDMA0 13
#define INT_TC32 14
#define INT_LCD 15
#define INT_ADC 16
#define INT_I2C 17
#define INT_RTCP 18
#define INT_RTCA 19
#define INT_NFC 20
#define INT_SD0 21
#define INT_GSB0 22
#define INT_PK 23
#define INT_USBH0 24
#define INT_USBH1 25
#define INT_G2D 26
#define INT_ECC 27
#define INT_SPI0RX 28
#define INT_UART1 29
#define INT_MSCL 30
#define INT_GSB1 31
/* PIC1 interrupts */
#define INT_E0 32
#define INT_E1 33
#define INT_E2 34
#define INT_E3 35
#define INT_E4 36
#define INT_E5 37
#define INT_E6 38
#define INT_E7 39
#define INT_UART2 40
#define INT_UART3 41
#define INT_SPI1TX 42
#define INT_SPI1RX 43
#define INT_GSB2 44
#define INT_SPDIF 45
#define INT_CDIF 46
#define INT_VBON 47
#define INT_VBOFF 48
#define INT_SD1 49
#define INT_UART4 50
#define INT_GDMA3 51
#define INT_I2S1RX 52
#define INT_I2S1TX 53
#define INT_CAN0 54
#define INT_CAN1 55
#define INT_GSB3 56
#define INT_KRST 57
#define INT_UNUSED 58
#define INT_SD0D3 59
#define INT_SD1D3 60
#define INT_GPS0 61
#define INT_GPS1 62
#define INT_GPS2 63
#endif /* ASM_ARCH_TCC_IRQS_H */
/*
* Author: <linux@telechips.com>
* Created: June 10, 2008
* Description: LINUX SYSTEM FUNCTIONS for TCC83x
*
* Copyright (C) 2008-2009 Telechips
*
* Licensed under the terms of the GPL v2.
*
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <linux/clk.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
extern void plat_tcc_reboot(void);
static inline void arch_idle(void)
{
cpu_do_idle();
}
static inline void arch_reset(char mode, const char *cmd)
{
plat_tcc_reboot();
}
#endif
This diff is collapsed.
/*
* A definition needed by arch core code.
*
*/
#define CLOCK_TICK_RATE (HZ * 100000UL)
/*
* Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
*
* This file is licensed under the terms of the GPL version 2.
*/
#include <linux/serial_reg.h>
#include <linux/types.h>
#include <mach/tcc8k-regs.h>
unsigned int system_rev;
#define ID_MASK 0x7fff
static void putc(int c)
{
u32 *uart_lsr = (u32 *)(UART_BASE_PHYS + (UART_LSR << 2));
u32 *uart_tx = (u32 *)(UART_BASE_PHYS + (UART_TX << 2));
while (!(*uart_lsr & UART_LSR_THRE))
barrier();
*uart_tx = c;
}
static inline void flush(void)
{
}
/*
* nothing to do
*/
#define arch_decomp_setup()
#define arch_decomp_wdog()
/*
* Author: <linux@telechips.com>
* Created: June 10, 2008
*
* Copyright (C) 2000 Russell King.
* Copyright (C) 2008-2009 Telechips
*
* Licensed under the terms of the GPL v2.
*/
#define VMALLOC_END 0xf0000000UL
/*
* System functions for Telechips TCCxxxx SoCs
*
* Copyright (C) Hans J. Koch <hjk@linutronix.de>
*
* Licensed under the terms of the GPL v2.
*
*/
#include <linux/io.h>
#include <mach/tcc8k-regs.h>
/* System reboot */
void plat_tcc_reboot(void)
{
/* Make sure clocks are on */
__raw_writel(0xffffffff, CKC_BASE + BCLKCTR0_OFFS);
/* Enable watchdog reset */
__raw_writel(0x49, TIMER_BASE + TWDCFG_OFFS);
/* Wait for reset */
while(1)
;
}
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