Commit 2eeeaf16 authored by Paul Mackerras's avatar Paul Mackerras

KVM: PPC: Book3S HV: Make sure to load LPID for radix VCPUs

Commit 70ea13f6 ("KVM: PPC: Book3S HV: Flush TLB on secondary radix
threads", 2019-04-29) aimed to make radix guests that are using the
real-mode entry path load the LPID register and flush the TLB in the
same place where those things are done for HPT guests.  However, it
omitted to remove a branch which branches around that code for radix
guests.  The result is that with indep_thread_mode = N, radix guests
don't run correctly.  (With indep_threads_mode = Y, which is the
default, radix guests use a different entry path.)

This removes the offending branch, and also the load and compare that
the branch depends on, since the cr7 setting is now unused.
Reported-by: default avatarSuraj Jitindar Singh <sjitindarsingh@gmail.com>
Tested-by: default avatarSuraj Jitindar Singh <sjitindarsingh@gmail.com>
Fixes: 70ea13f6 ("KVM: PPC: Book3S HV: Flush TLB on secondary radix threads")
Signed-off-by: default avatarPaul Mackerras <paulus@ozlabs.org>
parent 0caecf5b
...@@ -581,11 +581,8 @@ kvmppc_hv_entry: ...@@ -581,11 +581,8 @@ kvmppc_hv_entry:
1: 1:
#endif #endif
/* Use cr7 as an indication of radix mode */
ld r5, HSTATE_KVM_VCORE(r13) ld r5, HSTATE_KVM_VCORE(r13)
ld r9, VCORE_KVM(r5) /* pointer to struct kvm */ ld r9, VCORE_KVM(r5) /* pointer to struct kvm */
lbz r0, KVM_RADIX(r9)
cmpwi cr7, r0, 0
/* /*
* POWER7/POWER8 host -> guest partition switch code. * POWER7/POWER8 host -> guest partition switch code.
...@@ -608,9 +605,6 @@ kvmppc_hv_entry: ...@@ -608,9 +605,6 @@ kvmppc_hv_entry:
cmpwi r6,0 cmpwi r6,0
bne 10f bne 10f
/* Radix has already switched LPID and flushed core TLB */
bne cr7, 22f
lwz r7,KVM_LPID(r9) lwz r7,KVM_LPID(r9)
BEGIN_FTR_SECTION BEGIN_FTR_SECTION
ld r6,KVM_SDR1(r9) ld r6,KVM_SDR1(r9)
......
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