Commit 2f1b5bc8 authored by Shannon Nelson's avatar Shannon Nelson Committed by Jeff Kirsher

i40e/i40evf: add wait states to NVM state machine

This adds wait states to the NVM update state machine to signify when
waiting for an update operation to finish, whether we're in the middle
of a set of Write operations, or we're now idle but waiting.

Change-ID: Iabe91d6579ef6a2ea560647e374035656211ab43
Signed-off-by: default avatarShannon Nelson <shannon.nelson@intel.com>
Tested-by: default avatarAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 0af8e9db
...@@ -1018,6 +1018,19 @@ i40e_status i40e_clean_arq_element(struct i40e_hw *hw, ...@@ -1018,6 +1018,19 @@ i40e_status i40e_clean_arq_element(struct i40e_hw *hw,
i40e_release_nvm(hw); i40e_release_nvm(hw);
hw->aq.nvm_release_on_done = false; hw->aq.nvm_release_on_done = false;
} }
switch (hw->nvmupd_state) {
case I40E_NVMUPD_STATE_INIT_WAIT:
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
break;
case I40E_NVMUPD_STATE_WRITE_WAIT:
hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;
break;
default:
break;
}
} }
return ret_code; return ret_code;
......
...@@ -696,6 +696,12 @@ i40e_status i40e_nvmupd_command(struct i40e_hw *hw, ...@@ -696,6 +696,12 @@ i40e_status i40e_nvmupd_command(struct i40e_hw *hw,
status = i40e_nvmupd_state_writing(hw, cmd, bytes, perrno); status = i40e_nvmupd_state_writing(hw, cmd, bytes, perrno);
break; break;
case I40E_NVMUPD_STATE_INIT_WAIT:
case I40E_NVMUPD_STATE_WRITE_WAIT:
status = I40E_ERR_NOT_READY;
*perrno = -EBUSY;
break;
default: default:
/* invalid state, should never happen */ /* invalid state, should never happen */
i40e_debug(hw, I40E_DEBUG_NVM, i40e_debug(hw, I40E_DEBUG_NVM,
...@@ -759,10 +765,12 @@ static i40e_status i40e_nvmupd_state_init(struct i40e_hw *hw, ...@@ -759,10 +765,12 @@ static i40e_status i40e_nvmupd_state_init(struct i40e_hw *hw,
hw->aq.asq_last_status); hw->aq.asq_last_status);
} else { } else {
status = i40e_nvmupd_nvm_erase(hw, cmd, perrno); status = i40e_nvmupd_nvm_erase(hw, cmd, perrno);
if (status) if (status) {
i40e_release_nvm(hw); i40e_release_nvm(hw);
else } else {
hw->aq.nvm_release_on_done = true; hw->aq.nvm_release_on_done = true;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
}
} }
break; break;
...@@ -773,10 +781,12 @@ static i40e_status i40e_nvmupd_state_init(struct i40e_hw *hw, ...@@ -773,10 +781,12 @@ static i40e_status i40e_nvmupd_state_init(struct i40e_hw *hw,
hw->aq.asq_last_status); hw->aq.asq_last_status);
} else { } else {
status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno); status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
if (status) if (status) {
i40e_release_nvm(hw); i40e_release_nvm(hw);
else } else {
hw->aq.nvm_release_on_done = true; hw->aq.nvm_release_on_done = true;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
}
} }
break; break;
...@@ -790,7 +800,7 @@ static i40e_status i40e_nvmupd_state_init(struct i40e_hw *hw, ...@@ -790,7 +800,7 @@ static i40e_status i40e_nvmupd_state_init(struct i40e_hw *hw,
if (status) if (status)
i40e_release_nvm(hw); i40e_release_nvm(hw);
else else
hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING; hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;
} }
break; break;
...@@ -809,6 +819,7 @@ static i40e_status i40e_nvmupd_state_init(struct i40e_hw *hw, ...@@ -809,6 +819,7 @@ static i40e_status i40e_nvmupd_state_init(struct i40e_hw *hw,
i40e_release_nvm(hw); i40e_release_nvm(hw);
} else { } else {
hw->aq.nvm_release_on_done = true; hw->aq.nvm_release_on_done = true;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
} }
} }
break; break;
...@@ -838,7 +849,7 @@ static i40e_status i40e_nvmupd_state_reading(struct i40e_hw *hw, ...@@ -838,7 +849,7 @@ static i40e_status i40e_nvmupd_state_reading(struct i40e_hw *hw,
struct i40e_nvm_access *cmd, struct i40e_nvm_access *cmd,
u8 *bytes, int *perrno) u8 *bytes, int *perrno)
{ {
i40e_status status; i40e_status status = 0;
enum i40e_nvmupd_cmd upd_cmd; enum i40e_nvmupd_cmd upd_cmd;
upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno); upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);
...@@ -880,7 +891,7 @@ static i40e_status i40e_nvmupd_state_writing(struct i40e_hw *hw, ...@@ -880,7 +891,7 @@ static i40e_status i40e_nvmupd_state_writing(struct i40e_hw *hw,
struct i40e_nvm_access *cmd, struct i40e_nvm_access *cmd,
u8 *bytes, int *perrno) u8 *bytes, int *perrno)
{ {
i40e_status status; i40e_status status = 0;
enum i40e_nvmupd_cmd upd_cmd; enum i40e_nvmupd_cmd upd_cmd;
bool retry_attempt = false; bool retry_attempt = false;
...@@ -890,13 +901,22 @@ static i40e_status i40e_nvmupd_state_writing(struct i40e_hw *hw, ...@@ -890,13 +901,22 @@ static i40e_status i40e_nvmupd_state_writing(struct i40e_hw *hw,
switch (upd_cmd) { switch (upd_cmd) {
case I40E_NVMUPD_WRITE_CON: case I40E_NVMUPD_WRITE_CON:
status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno); status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
if (!status)
hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;
break; break;
case I40E_NVMUPD_WRITE_LCB: case I40E_NVMUPD_WRITE_LCB:
status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno); status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
if (!status) if (status) {
*perrno = hw->aq.asq_last_status ?
i40e_aq_rc_to_posix(status,
hw->aq.asq_last_status) :
-EIO;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
} else {
hw->aq.nvm_release_on_done = true; hw->aq.nvm_release_on_done = true;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
}
break; break;
case I40E_NVMUPD_CSUM_CON: case I40E_NVMUPD_CSUM_CON:
...@@ -907,19 +927,23 @@ static i40e_status i40e_nvmupd_state_writing(struct i40e_hw *hw, ...@@ -907,19 +927,23 @@ static i40e_status i40e_nvmupd_state_writing(struct i40e_hw *hw,
hw->aq.asq_last_status) : hw->aq.asq_last_status) :
-EIO; -EIO;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
} else {
hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;
} }
break; break;
case I40E_NVMUPD_CSUM_LCB: case I40E_NVMUPD_CSUM_LCB:
status = i40e_update_nvm_checksum(hw); status = i40e_update_nvm_checksum(hw);
if (status) if (status) {
*perrno = hw->aq.asq_last_status ? *perrno = hw->aq.asq_last_status ?
i40e_aq_rc_to_posix(status, i40e_aq_rc_to_posix(status,
hw->aq.asq_last_status) : hw->aq.asq_last_status) :
-EIO; -EIO;
else hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
} else {
hw->aq.nvm_release_on_done = true; hw->aq.nvm_release_on_done = true;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
}
break; break;
default: default:
......
...@@ -311,7 +311,9 @@ enum i40e_nvmupd_cmd { ...@@ -311,7 +311,9 @@ enum i40e_nvmupd_cmd {
enum i40e_nvmupd_state { enum i40e_nvmupd_state {
I40E_NVMUPD_STATE_INIT, I40E_NVMUPD_STATE_INIT,
I40E_NVMUPD_STATE_READING, I40E_NVMUPD_STATE_READING,
I40E_NVMUPD_STATE_WRITING I40E_NVMUPD_STATE_WRITING,
I40E_NVMUPD_STATE_INIT_WAIT,
I40E_NVMUPD_STATE_WRITE_WAIT,
}; };
/* nvm_access definition and its masks/shifts need to be accessible to /* nvm_access definition and its masks/shifts need to be accessible to
......
...@@ -310,7 +310,9 @@ enum i40e_nvmupd_cmd { ...@@ -310,7 +310,9 @@ enum i40e_nvmupd_cmd {
enum i40e_nvmupd_state { enum i40e_nvmupd_state {
I40E_NVMUPD_STATE_INIT, I40E_NVMUPD_STATE_INIT,
I40E_NVMUPD_STATE_READING, I40E_NVMUPD_STATE_READING,
I40E_NVMUPD_STATE_WRITING I40E_NVMUPD_STATE_WRITING,
I40E_NVMUPD_STATE_INIT_WAIT,
I40E_NVMUPD_STATE_WRITE_WAIT,
}; };
/* nvm_access definition and its masks/shifts need to be accessible to /* nvm_access definition and its masks/shifts need to be accessible to
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment