Commit 2f2219be authored by Mark Rustad's avatar Mark Rustad Committed by Jeff Kirsher

ixgbe: Add register wait for slow links

Use a new register to wait for previous register writes to complete
before issuing a register read. This is needed when slower links
are in use.
Signed-off-by: default avatarMark Rustad <mark.d.rustad@intel.com>
Tested-by: default avatarAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 2a9ed5d1
......@@ -371,6 +371,27 @@ u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
if (ixgbe_removed(reg_addr))
return IXGBE_FAILED_READ_REG;
if (unlikely(hw->phy.nw_mng_if_sel &
IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M)) {
struct ixgbe_adapter *adapter;
int i;
for (i = 0; i < 200; ++i) {
value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
if (likely(!value))
goto writes_completed;
if (value == IXGBE_FAILED_READ_REG) {
ixgbe_remove_adapter(hw);
return IXGBE_FAILED_READ_REG;
}
udelay(5);
}
adapter = hw->back;
e_warn(hw, "register writes incomplete %08x\n", value);
}
writes_completed:
value = readl(reg_addr + reg);
if (unlikely(value == IXGBE_FAILED_READ_REG))
ixgbe_check_remove(hw, reg);
......
......@@ -1131,6 +1131,7 @@ struct ixgbe_thermal_sensor_data {
#define IXGBE_XPCSS 0x04290
#define IXGBE_MFLCN 0x04294
#define IXGBE_SERDESC 0x04298
#define IXGBE_MAC_SGMII_BUSY 0x04298
#define IXGBE_MACS 0x0429C
#define IXGBE_AUTOC 0x042A0
#define IXGBE_LINKS 0x042A4
......
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