Commit 2f96fbb7 authored by Gregory CLEMENT's avatar Gregory CLEMENT Committed by Jason Cooper

arm: mvebu: add Aurora L2 Cache Controller to the DT

Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: default avatarYehuda Yitschak <yehuday@marvell.com>
Tested-and-reviewed-by: default avatarYehuda Yitschak <yehuday@marvell.com>
Tested-and-reviewed-by: default avatarLior Amsalem <alior@marvell.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>

Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent d792b1e9
......@@ -20,6 +20,12 @@
/ {
model = "Marvell Armada 370 family SoC";
compatible = "marvell,armada370", "marvell,armada-370-xp";
L2: l2-cache {
compatible = "marvell,aurora-outer-cache";
reg = <0xd0008000 0x1000>;
cache-id-part = <0x100>;
wt-override;
};
aliases {
gpio0 = &gpio0;
......
......@@ -22,6 +22,13 @@ / {
model = "Marvell Armada XP family SoC";
compatible = "marvell,armadaxp", "marvell,armada-370-xp";
L2: l2-cache {
compatible = "marvell,aurora-system-cache";
reg = <0xd0008000 0x1000>;
cache-id-part = <0x100>;
wt-override;
};
mpic: interrupt-controller@d0020000 {
reg = <0xd0020a00 0x1d0>,
<0xd0021070 0x58>;
......
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