Commit 301af295 authored by Michael Hennerich's avatar Michael Hennerich Committed by Bryan Wu

Blackfin arch: Finalize the generic gpio support - add gpio_to_irq and irq_to_gpio

Signed-off-by: default avatarMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: default avatarBryan Wu <bryan.wu@analog.com>
parent bc8c84c9
...@@ -421,6 +421,19 @@ unsigned short gpio_get_value(unsigned short gpio); ...@@ -421,6 +421,19 @@ unsigned short gpio_get_value(unsigned short gpio);
void gpio_direction_input(unsigned short gpio); void gpio_direction_input(unsigned short gpio);
void gpio_direction_output(unsigned short gpio); void gpio_direction_output(unsigned short gpio);
#include <asm-generic/gpio.h> /* cansleep wrappers */
#include <asm/irq.h>
static inline int gpio_to_irq(unsigned gpio)
{
return (gpio + GPIO_IRQ_BASE);
}
static inline int irq_to_gpio(unsigned irq)
{
return (irq - GPIO_IRQ_BASE);
}
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
#endif /* __ARCH_BLACKFIN_GPIO_H__ */ #endif /* __ARCH_BLACKFIN_GPIO_H__ */
...@@ -128,6 +128,8 @@ Core Emulation ** ...@@ -128,6 +128,8 @@ Core Emulation **
#define IRQ_PF14 47 #define IRQ_PF14 47
#define IRQ_PF15 48 #define IRQ_PF15 48
#define GPIO_IRQ_BASE IRQ_PF0
#ifdef CONFIG_IRQCHIP_DEMUX_GPIO #ifdef CONFIG_IRQCHIP_DEMUX_GPIO
#define NR_IRQS (IRQ_PF15+1) #define NR_IRQS (IRQ_PF15+1)
#else #else
......
...@@ -160,6 +160,8 @@ Core Emulation ** ...@@ -160,6 +160,8 @@ Core Emulation **
#define IRQ_PH14 96 #define IRQ_PH14 96
#define IRQ_PH15 97 #define IRQ_PH15 97
#define GPIO_IRQ_BASE IRQ_PF0
#ifdef CONFIG_IRQCHIP_DEMUX_GPIO #ifdef CONFIG_IRQCHIP_DEMUX_GPIO
#define NR_IRQS (IRQ_PH15+1) #define NR_IRQS (IRQ_PH15+1)
#else #else
......
...@@ -337,6 +337,8 @@ Events (highest priority) EMU 0 ...@@ -337,6 +337,8 @@ Events (highest priority) EMU 0
#define IRQ_PJ14 BFIN_PJ_IRQ(14) /* N/A */ #define IRQ_PJ14 BFIN_PJ_IRQ(14) /* N/A */
#define IRQ_PJ15 BFIN_PJ_IRQ(15) /* N/A */ #define IRQ_PJ15 BFIN_PJ_IRQ(15) /* N/A */
#define GPIO_IRQ_BASE IRQ_PA0
#ifdef CONFIG_IRQCHIP_DEMUX_GPIO #ifdef CONFIG_IRQCHIP_DEMUX_GPIO
#define NR_IRQS (IRQ_PJ15+1) #define NR_IRQS (IRQ_PJ15+1)
#else #else
......
...@@ -289,6 +289,8 @@ ...@@ -289,6 +289,8 @@
#define IRQ_PF46 119 #define IRQ_PF46 119
#define IRQ_PF47 120 #define IRQ_PF47 120
#define GPIO_IRQ_BASE IRQ_PF0
#ifdef CONFIG_IRQCHIP_DEMUX_GPIO #ifdef CONFIG_IRQCHIP_DEMUX_GPIO
#define NR_IRQS (IRQ_PF47 + 1) #define NR_IRQS (IRQ_PF47 + 1)
#else #else
......
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