Commit 30a1b5ef authored by Linus Walleij's avatar Linus Walleij Committed by Russell King

ARM: 7642/1: netx: bump IRQ offset to 64

The Netx IRQs offset from zero, which is illegal, since Linux
IRQ 0 is NO_IRQ.
Acked-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: default avatarJamie Iles <jamie@jamieiles.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 56a79b7b
...@@ -168,7 +168,7 @@ void __init netx_init_irq(void) ...@@ -168,7 +168,7 @@ void __init netx_init_irq(void)
{ {
int irq; int irq;
vic_init(io_p2v(NETX_PA_VIC), 0, ~0, 0); vic_init(io_p2v(NETX_PA_VIC), NETX_IRQ_VIC_START, ~0, 0);
for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
irq_set_chip_and_handler(irq, &netx_hif_chip, irq_set_chip_and_handler(irq, &netx_hif_chip,
......
...@@ -17,42 +17,42 @@ ...@@ -17,42 +17,42 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#define NETX_IRQ_VIC_START 0 #define NETX_IRQ_VIC_START 64
#define NETX_IRQ_SOFTINT 0 #define NETX_IRQ_SOFTINT (NETX_IRQ_VIC_START + 0)
#define NETX_IRQ_TIMER0 1 #define NETX_IRQ_TIMER0 (NETX_IRQ_VIC_START + 1)
#define NETX_IRQ_TIMER1 2 #define NETX_IRQ_TIMER1 (NETX_IRQ_VIC_START + 2)
#define NETX_IRQ_TIMER2 3 #define NETX_IRQ_TIMER2 (NETX_IRQ_VIC_START + 3)
#define NETX_IRQ_SYSTIME_NS 4 #define NETX_IRQ_SYSTIME_NS (NETX_IRQ_VIC_START + 4)
#define NETX_IRQ_SYSTIME_S 5 #define NETX_IRQ_SYSTIME_S (NETX_IRQ_VIC_START + 5)
#define NETX_IRQ_GPIO_15 6 #define NETX_IRQ_GPIO_15 (NETX_IRQ_VIC_START + 6)
#define NETX_IRQ_WATCHDOG 7 #define NETX_IRQ_WATCHDOG (NETX_IRQ_VIC_START + 7)
#define NETX_IRQ_UART0 8 #define NETX_IRQ_UART0 (NETX_IRQ_VIC_START + 8)
#define NETX_IRQ_UART1 9 #define NETX_IRQ_UART1 (NETX_IRQ_VIC_START + 9)
#define NETX_IRQ_UART2 10 #define NETX_IRQ_UART2 (NETX_IRQ_VIC_START + 10)
#define NETX_IRQ_USB 11 #define NETX_IRQ_USB (NETX_IRQ_VIC_START + 11)
#define NETX_IRQ_SPI 12 #define NETX_IRQ_SPI (NETX_IRQ_VIC_START + 12)
#define NETX_IRQ_I2C 13 #define NETX_IRQ_I2C (NETX_IRQ_VIC_START + 13)
#define NETX_IRQ_LCD 14 #define NETX_IRQ_LCD (NETX_IRQ_VIC_START + 14)
#define NETX_IRQ_HIF 15 #define NETX_IRQ_HIF (NETX_IRQ_VIC_START + 15)
#define NETX_IRQ_GPIO_0_14 16 #define NETX_IRQ_GPIO_0_14 (NETX_IRQ_VIC_START + 16)
#define NETX_IRQ_XPEC0 17 #define NETX_IRQ_XPEC0 (NETX_IRQ_VIC_START + 17)
#define NETX_IRQ_XPEC1 18 #define NETX_IRQ_XPEC1 (NETX_IRQ_VIC_START + 18)
#define NETX_IRQ_XPEC2 19 #define NETX_IRQ_XPEC2 (NETX_IRQ_VIC_START + 19)
#define NETX_IRQ_XPEC3 20 #define NETX_IRQ_XPEC3 (NETX_IRQ_VIC_START + 20)
#define NETX_IRQ_XPEC(no) (17 + (no)) #define NETX_IRQ_XPEC(no) (NETX_IRQ_VIC_START + 17 + (no))
#define NETX_IRQ_MSYNC0 21 #define NETX_IRQ_MSYNC0 (NETX_IRQ_VIC_START + 21)
#define NETX_IRQ_MSYNC1 22 #define NETX_IRQ_MSYNC1 (NETX_IRQ_VIC_START + 22)
#define NETX_IRQ_MSYNC2 23 #define NETX_IRQ_MSYNC2 (NETX_IRQ_VIC_START + 23)
#define NETX_IRQ_MSYNC3 24 #define NETX_IRQ_MSYNC3 (NETX_IRQ_VIC_START + 24)
#define NETX_IRQ_IRQ_PHY 25 #define NETX_IRQ_IRQ_PHY (NETX_IRQ_VIC_START + 25)
#define NETX_IRQ_ISO_AREA 26 #define NETX_IRQ_ISO_AREA (NETX_IRQ_VIC_START + 26)
/* int 27 is reserved */ /* int 27 is reserved */
/* int 28 is reserved */ /* int 28 is reserved */
#define NETX_IRQ_TIMER3 29 #define NETX_IRQ_TIMER3 (NETX_IRQ_VIC_START + 29)
#define NETX_IRQ_TIMER4 30 #define NETX_IRQ_TIMER4 (NETX_IRQ_VIC_START + 30)
/* int 31 is reserved */ /* int 31 is reserved */
#define NETX_IRQS 32 #define NETX_IRQS (NETX_IRQ_VIC_START + 32)
/* for multiplexed irqs on gpio 0..14 */ /* for multiplexed irqs on gpio 0..14 */
#define NETX_IRQ_GPIO(x) (NETX_IRQS + (x)) #define NETX_IRQ_GPIO(x) (NETX_IRQS + (x))
......
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