Commit 310e782a authored by Shyam Sundar S K's avatar Shyam Sundar S K Committed by Hans de Goede

platform/x86/amd: pmc: Utilize SMN index 0 for driver probe

The current SMN index used for the driver probe seems to be meant
for the BIOS pair and there are potential concurrency problems that can
occur with an inopportune SMI.

It is been advised to use SMN_INDEX_0 instead of SMN_INDEX_2, which is
what amd_nb.c provides and this function has protections to ensure that
only one caller can use it at a time.

Fixes: 156ec473 ("platform/x86: amd-pmc: Add AMD platform support for S2Idle")
Co-developed-by: default avatarSanket Goswami <Sanket.Goswami@amd.com>
Signed-off-by: default avatarSanket Goswami <Sanket.Goswami@amd.com>
Signed-off-by: default avatarShyam Sundar S K <Shyam-sundar.S-k@amd.com>
Link: https://lore.kernel.org/r/20230409185348.556161-6-Shyam-sundar.S-k@amd.comReviewed-by: default avatarHans de Goede <hdegoede@redhat.com>
Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
parent 9217bd1d
...@@ -7,7 +7,7 @@ source "drivers/platform/x86/amd/pmf/Kconfig" ...@@ -7,7 +7,7 @@ source "drivers/platform/x86/amd/pmf/Kconfig"
config AMD_PMC config AMD_PMC
tristate "AMD SoC PMC driver" tristate "AMD SoC PMC driver"
depends on ACPI && PCI && RTC_CLASS depends on ACPI && PCI && RTC_CLASS && AMD_NB
select SERIO select SERIO
help help
The driver provides support for AMD Power Management Controller The driver provides support for AMD Power Management Controller
......
...@@ -10,6 +10,7 @@ ...@@ -10,6 +10,7 @@
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <asm/amd_nb.h>
#include <linux/acpi.h> #include <linux/acpi.h>
#include <linux/bitfield.h> #include <linux/bitfield.h>
#include <linux/bits.h> #include <linux/bits.h>
...@@ -56,8 +57,6 @@ ...@@ -56,8 +57,6 @@
#define S2D_TELEMETRY_DRAMBYTES_MAX 0x1000000 #define S2D_TELEMETRY_DRAMBYTES_MAX 0x1000000
/* Base address of SMU for mapping physical address to virtual address */ /* Base address of SMU for mapping physical address to virtual address */
#define AMD_PMC_SMU_INDEX_ADDRESS 0xB8
#define AMD_PMC_SMU_INDEX_DATA 0xBC
#define AMD_PMC_MAPPING_SIZE 0x01000 #define AMD_PMC_MAPPING_SIZE 0x01000
#define AMD_PMC_BASE_ADDR_OFFSET 0x10000 #define AMD_PMC_BASE_ADDR_OFFSET 0x10000
#define AMD_PMC_BASE_ADDR_LO 0x13B102E8 #define AMD_PMC_BASE_ADDR_LO 0x13B102E8
...@@ -983,30 +982,18 @@ static int amd_pmc_probe(struct platform_device *pdev) ...@@ -983,30 +982,18 @@ static int amd_pmc_probe(struct platform_device *pdev)
dev->cpu_id = rdev->device; dev->cpu_id = rdev->device;
dev->rdev = rdev; dev->rdev = rdev;
err = pci_write_config_dword(rdev, AMD_PMC_SMU_INDEX_ADDRESS, AMD_PMC_BASE_ADDR_LO); err = amd_smn_read(0, AMD_PMC_BASE_ADDR_LO, &val);
if (err) {
dev_err(dev->dev, "error writing to 0x%x\n", AMD_PMC_SMU_INDEX_ADDRESS);
err = pcibios_err_to_errno(err);
goto err_pci_dev_put;
}
err = pci_read_config_dword(rdev, AMD_PMC_SMU_INDEX_DATA, &val);
if (err) { if (err) {
dev_err(dev->dev, "error reading 0x%x\n", AMD_PMC_BASE_ADDR_LO);
err = pcibios_err_to_errno(err); err = pcibios_err_to_errno(err);
goto err_pci_dev_put; goto err_pci_dev_put;
} }
base_addr_lo = val & AMD_PMC_BASE_ADDR_HI_MASK; base_addr_lo = val & AMD_PMC_BASE_ADDR_HI_MASK;
err = pci_write_config_dword(rdev, AMD_PMC_SMU_INDEX_ADDRESS, AMD_PMC_BASE_ADDR_HI); err = amd_smn_read(0, AMD_PMC_BASE_ADDR_HI, &val);
if (err) {
dev_err(dev->dev, "error writing to 0x%x\n", AMD_PMC_SMU_INDEX_ADDRESS);
err = pcibios_err_to_errno(err);
goto err_pci_dev_put;
}
err = pci_read_config_dword(rdev, AMD_PMC_SMU_INDEX_DATA, &val);
if (err) { if (err) {
dev_err(dev->dev, "error reading 0x%x\n", AMD_PMC_BASE_ADDR_HI);
err = pcibios_err_to_errno(err); err = pcibios_err_to_errno(err);
goto err_pci_dev_put; goto err_pci_dev_put;
} }
......
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