Commit 31b6ec67 authored by Keguang Zhang's avatar Keguang Zhang Committed by Bartosz Golaszewski

gpio: loongson1: Introduce ls1x_gpio_chip struct

This patch introduces and allocates ls1x_gpio_chip struct containing
gpio_chip and reg_base to avoid global gpio_reg_base.
Signed-off-by: default avatarKeguang Zhang <keguang.zhang@gmail.com>
Signed-off-by: default avatarBartosz Golaszewski <bartosz.golaszewski@linaro.org>
parent a9b4678a
...@@ -16,15 +16,19 @@ ...@@ -16,15 +16,19 @@
#define GPIO_DATA 0x20 #define GPIO_DATA 0x20
#define GPIO_OUTPUT 0x30 #define GPIO_OUTPUT 0x30
static void __iomem *gpio_reg_base; struct ls1x_gpio_chip {
struct gpio_chip gc;
void __iomem *reg_base;
};
static int ls1x_gpio_request(struct gpio_chip *gc, unsigned int offset) static int ls1x_gpio_request(struct gpio_chip *gc, unsigned int offset)
{ {
struct ls1x_gpio_chip *ls1x_gc = gpiochip_get_data(gc);
unsigned long flags; unsigned long flags;
raw_spin_lock_irqsave(&gc->bgpio_lock, flags); raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
__raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) | BIT(offset), __raw_writel(__raw_readl(ls1x_gc->reg_base + GPIO_CFG) | BIT(offset),
gpio_reg_base + GPIO_CFG); ls1x_gc->reg_base + GPIO_CFG);
raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
return 0; return 0;
...@@ -32,44 +36,45 @@ static int ls1x_gpio_request(struct gpio_chip *gc, unsigned int offset) ...@@ -32,44 +36,45 @@ static int ls1x_gpio_request(struct gpio_chip *gc, unsigned int offset)
static void ls1x_gpio_free(struct gpio_chip *gc, unsigned int offset) static void ls1x_gpio_free(struct gpio_chip *gc, unsigned int offset)
{ {
struct ls1x_gpio_chip *ls1x_gc = gpiochip_get_data(gc);
unsigned long flags; unsigned long flags;
raw_spin_lock_irqsave(&gc->bgpio_lock, flags); raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
__raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) & ~BIT(offset), __raw_writel(__raw_readl(ls1x_gc->reg_base + GPIO_CFG) & ~BIT(offset),
gpio_reg_base + GPIO_CFG); ls1x_gc->reg_base + GPIO_CFG);
raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
} }
static int ls1x_gpio_probe(struct platform_device *pdev) static int ls1x_gpio_probe(struct platform_device *pdev)
{ {
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
struct gpio_chip *gc; struct ls1x_gpio_chip *ls1x_gc;
int ret; int ret;
gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL); ls1x_gc = devm_kzalloc(dev, sizeof(*ls1x_gc), GFP_KERNEL);
if (!gc) if (!ls1x_gc)
return -ENOMEM; return -ENOMEM;
gpio_reg_base = devm_platform_ioremap_resource(pdev, 0); ls1x_gc->reg_base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(gpio_reg_base)) if (IS_ERR(ls1x_gc->reg_base))
return PTR_ERR(gpio_reg_base); return PTR_ERR(ls1x_gc->reg_base);
ret = bgpio_init(gc, dev, 4, gpio_reg_base + GPIO_DATA, ret = bgpio_init(&ls1x_gc->gc, dev, 4, ls1x_gc->reg_base + GPIO_DATA,
gpio_reg_base + GPIO_OUTPUT, NULL, ls1x_gc->reg_base + GPIO_OUTPUT, NULL,
NULL, gpio_reg_base + GPIO_DIR, 0); NULL, ls1x_gc->reg_base + GPIO_DIR, 0);
if (ret) if (ret)
goto err; goto err;
gc->owner = THIS_MODULE; ls1x_gc->gc.owner = THIS_MODULE;
gc->request = ls1x_gpio_request; ls1x_gc->gc.request = ls1x_gpio_request;
gc->free = ls1x_gpio_free; ls1x_gc->gc.free = ls1x_gpio_free;
gc->base = pdev->id * 32; ls1x_gc->gc.base = pdev->id * 32;
ret = devm_gpiochip_add_data(dev, gc, NULL); ret = devm_gpiochip_add_data(dev, &ls1x_gc->gc, ls1x_gc);
if (ret) if (ret)
goto err; goto err;
platform_set_drvdata(pdev, gc); platform_set_drvdata(pdev, ls1x_gc);
dev_info(dev, "Loongson1 GPIO driver registered\n"); dev_info(dev, "Loongson1 GPIO driver registered\n");
return 0; return 0;
......
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