Commit 31faff81 authored by Vasanthakumar Thiagarajan's avatar Vasanthakumar Thiagarajan Committed by John W. Linville

ath9k_hw: Define IQcal correction coefficient registers using index

Signed-off-by: default avatarVasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 6559e83e
...@@ -606,11 +606,6 @@ static void ar9003_hw_tx_iq_cal(struct ath_hw *ah) ...@@ -606,11 +606,6 @@ static void ar9003_hw_tx_iq_cal(struct ath_hw *ah)
AR_PHY_TX_IQCAL_STATUS_B1, AR_PHY_TX_IQCAL_STATUS_B1,
AR_PHY_TX_IQCAL_STATUS_B2, AR_PHY_TX_IQCAL_STATUS_B2,
}; };
static const u32 tx_corr_coeff[AR9300_MAX_CHAINS] = {
AR_PHY_TX_IQCAL_CORR_COEFF_01_B0,
AR_PHY_TX_IQCAL_CORR_COEFF_01_B1,
AR_PHY_TX_IQCAL_CORR_COEFF_01_B2,
};
static const u32 rx_corr[AR9300_MAX_CHAINS] = { static const u32 rx_corr[AR9300_MAX_CHAINS] = {
AR_PHY_RX_IQCAL_CORR_B0, AR_PHY_RX_IQCAL_CORR_B0,
AR_PHY_RX_IQCAL_CORR_B1, AR_PHY_RX_IQCAL_CORR_B1,
...@@ -621,11 +616,16 @@ static void ar9003_hw_tx_iq_cal(struct ath_hw *ah) ...@@ -621,11 +616,16 @@ static void ar9003_hw_tx_iq_cal(struct ath_hw *ah)
AR_PHY_CHAN_INFO_TAB_1, AR_PHY_CHAN_INFO_TAB_1,
AR_PHY_CHAN_INFO_TAB_2, AR_PHY_CHAN_INFO_TAB_2,
}; };
u32 tx_corr_coeff[AR9300_MAX_CHAINS];
s32 iq_res[6]; s32 iq_res[6];
s32 iqc_coeff[2]; s32 iqc_coeff[2];
s32 i, j; s32 i, j;
u32 num_chains = 0; u32 num_chains = 0;
tx_corr_coeff[0] = AR_PHY_TX_IQCAL_CORR_COEFF_B0(0);
tx_corr_coeff[1] = AR_PHY_TX_IQCAL_CORR_COEFF_B1(0);
tx_corr_coeff[2] = AR_PHY_TX_IQCAL_CORR_COEFF_B2(0);
for (i = 0; i < AR9300_MAX_CHAINS; i++) { for (i = 0; i < AR9300_MAX_CHAINS; i++) {
if (ah->txchainmask & (1 << i)) if (ah->txchainmask & (1 << i))
num_chains++; num_chains++;
......
...@@ -549,7 +549,9 @@ ...@@ -549,7 +549,9 @@
#define AR_PHY_TX_IQCAL_CONTROL_1 (AR_SM_BASE + 0x448) #define AR_PHY_TX_IQCAL_CONTROL_1 (AR_SM_BASE + 0x448)
#define AR_PHY_TX_IQCAL_START (AR_SM_BASE + 0x440) #define AR_PHY_TX_IQCAL_START (AR_SM_BASE + 0x440)
#define AR_PHY_TX_IQCAL_STATUS_B0 (AR_SM_BASE + 0x48c) #define AR_PHY_TX_IQCAL_STATUS_B0 (AR_SM_BASE + 0x48c)
#define AR_PHY_TX_IQCAL_CORR_COEFF_01_B0 (AR_SM_BASE + 0x450) #define AR_PHY_TX_IQCAL_CORR_COEFF_B0(_i) (AR_SM_BASE + \
(AR_SREV_9485(ah) ? \
0x3d0 : 0x450) + ((_i) << 2))
#define AR_PHY_WATCHDOG_STATUS (AR_SM_BASE + 0x5c0) #define AR_PHY_WATCHDOG_STATUS (AR_SM_BASE + 0x5c0)
#define AR_PHY_WATCHDOG_CTL_1 (AR_SM_BASE + 0x5c4) #define AR_PHY_WATCHDOG_CTL_1 (AR_SM_BASE + 0x5c4)
...@@ -813,7 +815,7 @@ ...@@ -813,7 +815,7 @@
#define AR_PHY_TPC_11_B1 (AR_SM1_BASE + 0x220) #define AR_PHY_TPC_11_B1 (AR_SM1_BASE + 0x220)
#define AR_PHY_PDADC_TAB_1 (AR_SM1_BASE + 0x240) #define AR_PHY_PDADC_TAB_1 (AR_SM1_BASE + 0x240)
#define AR_PHY_TX_IQCAL_STATUS_B1 (AR_SM1_BASE + 0x48c) #define AR_PHY_TX_IQCAL_STATUS_B1 (AR_SM1_BASE + 0x48c)
#define AR_PHY_TX_IQCAL_CORR_COEFF_01_B1 (AR_SM1_BASE + 0x450) #define AR_PHY_TX_IQCAL_CORR_COEFF_B1(_i) (AR_SM_BASE + 0x450 + ((_i) << 2))
/* /*
* Channel 2 Register Map * Channel 2 Register Map
...@@ -866,7 +868,7 @@ ...@@ -866,7 +868,7 @@
#define AR_PHY_TPC_11_B2 (AR_SM2_BASE + 0x220) #define AR_PHY_TPC_11_B2 (AR_SM2_BASE + 0x220)
#define AR_PHY_PDADC_TAB_2 (AR_SM2_BASE + 0x240) #define AR_PHY_PDADC_TAB_2 (AR_SM2_BASE + 0x240)
#define AR_PHY_TX_IQCAL_STATUS_B2 (AR_SM2_BASE + 0x48c) #define AR_PHY_TX_IQCAL_STATUS_B2 (AR_SM2_BASE + 0x48c)
#define AR_PHY_TX_IQCAL_CORR_COEFF_01_B2 (AR_SM2_BASE + 0x450) #define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i) (AR_SM2_BASE + 0x450 + ((_i) << 2))
#define AR_PHY_TX_IQCAL_STATUS_B2_FAILED 0x00000001 #define AR_PHY_TX_IQCAL_STATUS_B2_FAILED 0x00000001
......
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