Commit 338302ae authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard

ARM: dts: sunxi: Use sun4i-a10-apb1-clk for sun6i/sun8i apb2 clocks.

The apb2 clocks are actually the same as apb1 clocks on the other sunxi
platforms, hence compatible with "allwinner,sun4i-a10-apb1-clk".

Update the dtsi to use the new unified apb1 clk.
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent e883d672
......@@ -217,19 +217,11 @@ apb1_gates: clk@01c20068 {
"apb1_daudio1";
};
apb2_mux: apb2_mux@01c20058 {
apb2: clk@01c20058 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-apb1-mux-clk";
compatible = "allwinner,sun4i-a10-apb1-clk";
reg = <0x01c20058 0x4>;
clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
clock-output-names = "apb2_mux";
};
apb2: apb2@01c20058 {
#clock-cells = <0>;
compatible = "allwinner,sun6i-a31-apb2-div-clk";
reg = <0x01c20058 0x4>;
clocks = <&apb2_mux>;
clock-output-names = "apb2";
};
......
......@@ -189,19 +189,11 @@ apb1_gates: clk@01c20068 {
"apb1_daudio0", "apb1_daudio1";
};
apb2_mux: apb2_mux_clk@01c20058 {
apb2: clk@01c20058 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-apb1-mux-clk";
compatible = "allwinner,sun4i-a10-apb1-clk";
reg = <0x01c20058 0x4>;
clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
clock-output-names = "apb2_mux";
};
apb2: apb2_clk@01c20058 {
#clock-cells = <0>;
compatible = "allwinner,sun6i-a31-apb2-div-clk";
reg = <0x01c20058 0x4>;
clocks = <&apb2_mux>;
clock-output-names = "apb2";
};
......
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