Commit 338aae54 authored by Dave Airlie's avatar Dave Airlie

Merge tag 'drm-intel-next-fixes-2024-09-19' of...

Merge tag 'drm-intel-next-fixes-2024-09-19' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next

- Fix BMG support to UHBR13.5
- Two PSR fixes
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZuvzjAbx2pmjahxK@jlahtine-mobl.ger.corp.intel.com
parents ae2c6d8b ec2231b8
......@@ -916,7 +916,7 @@ intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port,
* instead of a specific AUX_IO_<port> reference without powering up any
* extra wells.
*/
if (intel_encoder_can_psr(&dig_port->base))
if (intel_psr_needs_aux_io_power(&dig_port->base, crtc_state))
return intel_display_power_aux_io_domain(i915, dig_port->aux_ch);
else if (DISPLAY_VER(i915) < 14 &&
(intel_crtc_has_dp_encoder(crtc_state) ||
......
......@@ -531,6 +531,10 @@ static void
intel_dp_set_source_rates(struct intel_dp *intel_dp)
{
/* The values must be in increasing order */
static const int bmg_rates[] = {
162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000,
810000, 1000000, 1350000,
};
static const int mtl_rates[] = {
162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000,
810000, 1000000, 2000000,
......@@ -561,8 +565,13 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
intel_dp->source_rates || intel_dp->num_source_rates);
if (DISPLAY_VER(dev_priv) >= 14) {
source_rates = mtl_rates;
size = ARRAY_SIZE(mtl_rates);
if (IS_BATTLEMAGE(dev_priv)) {
source_rates = bmg_rates;
size = ARRAY_SIZE(bmg_rates);
} else {
source_rates = mtl_rates;
size = ARRAY_SIZE(mtl_rates);
}
max_rate = mtl_max_source_rate(intel_dp);
} else if (DISPLAY_VER(dev_priv) >= 11) {
source_rates = icl_rates;
......
......@@ -203,6 +203,25 @@ bool intel_encoder_can_psr(struct intel_encoder *encoder)
return false;
}
bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
/*
* For PSR/PR modes only eDP requires the AUX IO power to be enabled whenever
* the output is enabled. For non-eDP outputs the main link is always
* on, hence it doesn't require the HW initiated AUX wake-up signaling used
* for eDP.
*
* TODO:
* - Consider leaving AUX IO disabled for eDP / PR as well, in case
* the ALPM with main-link off mode is not enabled.
* - Leave AUX IO enabled for DP / PR, once support for ALPM with
* main-link off mode is added for it and this mode gets enabled.
*/
return intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
intel_encoder_can_psr(encoder);
}
static bool psr_global_enabled(struct intel_dp *intel_dp)
{
struct intel_display *display = to_intel_display(intel_dp);
......@@ -2784,13 +2803,6 @@ static int _psr1_ready_for_pipe_update_locked(struct intel_dp *intel_dp)
EDP_PSR_STATUS_STATE_MASK, 50);
}
static int _panel_replay_ready_for_pipe_update_locked(struct intel_dp *intel_dp)
{
return intel_dp_is_edp(intel_dp) ?
_psr2_ready_for_pipe_update_locked(intel_dp) :
_psr1_ready_for_pipe_update_locked(intel_dp);
}
/**
* intel_psr_wait_for_idle_locked - wait for PSR be ready for a pipe update
* @new_crtc_state: new CRTC state
......@@ -2813,12 +2825,10 @@ void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_stat
lockdep_assert_held(&intel_dp->psr.lock);
if (!intel_dp->psr.enabled)
if (!intel_dp->psr.enabled || intel_dp->psr.panel_replay_enabled)
continue;
if (intel_dp->psr.panel_replay_enabled)
ret = _panel_replay_ready_for_pipe_update_locked(intel_dp);
else if (intel_dp->psr.sel_update_enabled)
if (intel_dp->psr.sel_update_enabled)
ret = _psr2_ready_for_pipe_update_locked(intel_dp);
else
ret = _psr1_ready_for_pipe_update_locked(intel_dp);
......
......@@ -25,6 +25,8 @@ struct intel_plane_state;
(intel_dp)->psr.source_panel_replay_support)
bool intel_encoder_can_psr(struct intel_encoder *encoder);
bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_psr_init_dpcd(struct intel_dp *intel_dp);
void intel_psr_enable_sink(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
......
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