Commit 33fdddbd authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Sasha Levin

usb: renesas_usbhs: Don't disable the pipe if Control write status stage

[ Upstream commit b4c25261 ]

commit 93fb9127 upstream.

This patch fixes an issue that sometimes this controller is not able
to complete the Control write status stage.

This driver should enable DCPCTR.CCPL and PID_BUF to complete the status
stage. However, if this driver detects the ctrl_stage interruption first
before the control write data is received, this driver will clear the
PID_BUF wrongly in the usbhsf_pio_try_pop(). To avoid this issue, this
patch doesn't clear the PID_BUF in the usbhsf_pio_try_pop().
(Since also the privious code doesn't disable the PID_BUF after a control
 transfer was finished, this patch doesn't have any side efforts.)
Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
Signed-off-by: default avatarSasha Levin <sasha.levin@oracle.com>
parent 8066dce0
......@@ -688,7 +688,14 @@ static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
*is_done = 1;
usbhsf_rx_irq_ctrl(pipe, 0);
usbhs_pipe_running(pipe, 0);
usbhs_pipe_disable(pipe); /* disable pipe first */
/*
* If function mode, since this controller is possible to enter
* Control Write status stage at this timing, this driver
* should not disable the pipe. If such a case happens, this
* controller is not able to complete the status stage.
*/
if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe))
usbhs_pipe_disable(pipe); /* disable pipe first */
}
/*
......
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