Commit 3460743e authored by Ben Dooks's avatar Ben Dooks

ARM: net: fix arm instruction endian-ness in bpf_jit_32.c

Use <asm/opcodes.h> to correctly transform instruction byte ordering
into in-memory ordering.
Signed-off-by: default avatarBen Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: default avatarDave Martin <Dave.Martin@arm.com>
parent bfdef3b3
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#include <linux/if_vlan.h> #include <linux/if_vlan.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/hwcap.h> #include <asm/hwcap.h>
#include <asm/opcodes.h>
#include "bpf_jit_32.h" #include "bpf_jit_32.h"
...@@ -113,8 +114,11 @@ static u32 jit_udiv(u32 dividend, u32 divisor) ...@@ -113,8 +114,11 @@ static u32 jit_udiv(u32 dividend, u32 divisor)
static inline void _emit(int cond, u32 inst, struct jit_ctx *ctx) static inline void _emit(int cond, u32 inst, struct jit_ctx *ctx)
{ {
inst |= (cond << 28);
inst = __opcode_to_mem_arm(inst);
if (ctx->target != NULL) if (ctx->target != NULL)
ctx->target[ctx->idx] = inst | (cond << 28); ctx->target[ctx->idx] = inst;
ctx->idx++; ctx->idx++;
} }
......
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