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Kirill Smelkov
linux
Commits
359542b2
Commit
359542b2
authored
May 19, 2010
by
Ben Dooks
Browse files
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Browse Files
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Plain Diff
ARM: Merge for-2635/s5p-general
Merge branch 'for-2635/s5p-general' into for-linus/samsung2
parents
bc3b67b8
ea5f5070
Changes
8
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8 changed files
with
284 additions
and
8 deletions
+284
-8
arch/arm/mach-s5p6440/cpu.c
arch/arm/mach-s5p6440/cpu.c
+1
-1
arch/arm/mach-s5p6442/cpu.c
arch/arm/mach-s5p6442/cpu.c
+1
-1
arch/arm/mach-s5pv210/Makefile
arch/arm/mach-s5pv210/Makefile
+1
-1
arch/arm/mach-s5pv210/cpu.c
arch/arm/mach-s5pv210/cpu.c
+1
-1
arch/arm/mach-s5pv210/gpiolib.c
arch/arm/mach-s5pv210/gpiolib.c
+261
-0
arch/arm/mach-s5pv210/include/mach/gpio.h
arch/arm/mach-s5pv210/include/mach/gpio.h
+15
-3
arch/arm/plat-s5p/include/plat/irqs.h
arch/arm/plat-s5p/include/plat/irqs.h
+1
-1
arch/arm/plat-samsung/include/plat/cpu.h
arch/arm/plat-samsung/include/plat/cpu.h
+3
-0
No files found.
arch/arm/mach-s5p6440/cpu.c
View file @
359542b2
...
...
@@ -88,7 +88,7 @@ void __init s5p6440_init_irq(void)
s5p_init_irq
(
vic
,
ARRAY_SIZE
(
vic
));
}
st
atic
st
ruct
sysdev_class
s5p6440_sysclass
=
{
struct
sysdev_class
s5p6440_sysclass
=
{
.
name
=
"s5p6440-core"
,
};
...
...
arch/arm/mach-s5p6442/cpu.c
View file @
359542b2
...
...
@@ -95,7 +95,7 @@ void __init s5p6442_init_irq(void)
s5p_init_irq
(
vic
,
ARRAY_SIZE
(
vic
));
}
st
atic
st
ruct
sysdev_class
s5p6442_sysclass
=
{
struct
sysdev_class
s5p6442_sysclass
=
{
.
name
=
"s5p6442-core"
,
};
...
...
arch/arm/mach-s5pv210/Makefile
View file @
359542b2
...
...
@@ -12,7 +12,7 @@ obj- :=
# Core support for S5PV210 system
obj-$(CONFIG_CPU_S5PV210)
+=
cpu.o init.o clock.o
obj-$(CONFIG_CPU_S5PV210)
+=
cpu.o init.o clock.o
gpiolib.o
# machine support
...
...
arch/arm/mach-s5pv210/cpu.c
View file @
359542b2
...
...
@@ -100,7 +100,7 @@ void __init s5pv210_init_irq(void)
s5p_init_irq
(
vic
,
ARRAY_SIZE
(
vic
));
}
st
atic
st
ruct
sysdev_class
s5pv210_sysclass
=
{
struct
sysdev_class
s5pv210_sysclass
=
{
.
name
=
"s5pv210-core"
,
};
...
...
arch/arm/mach-s5pv210/gpiolib.c
0 → 100644
View file @
359542b2
/* linux/arch/arm/mach-s5pv210/gpiolib.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* S5PV210 - GPIOlib support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <plat/gpio-core.h>
#include <plat/gpio-cfg.h>
#include <plat/gpio-cfg-helpers.h>
#include <mach/map.h>
static
struct
s3c_gpio_cfg
gpio_cfg
=
{
.
set_config
=
s3c_gpio_setcfg_s3c64xx_4bit
,
.
set_pull
=
s3c_gpio_setpull_updown
,
.
get_pull
=
s3c_gpio_getpull_updown
,
};
static
struct
s3c_gpio_cfg
gpio_cfg_noint
=
{
.
set_config
=
s3c_gpio_setcfg_s3c64xx_4bit
,
.
set_pull
=
s3c_gpio_setpull_updown
,
.
get_pull
=
s3c_gpio_getpull_updown
,
};
/* GPIO bank's base address given the index of the bank in the
* list of all gpio banks.
*/
#define S5PV210_BANK_BASE(bank_nr) (S5P_VA_GPIO + ((bank_nr) * 0x20))
/*
* Following are the gpio banks in v210.
*
* The 'config' member when left to NULL, is initialized to the default
* structure gpio_cfg in the init function below.
*
* The 'base' member is also initialized in the init function below.
* Note: The initialization of 'base' member of s3c_gpio_chip structure
* uses the above macro and depends on the banks being listed in order here.
*/
static
struct
s3c_gpio_chip
s5pv210_gpio_4bit
[]
=
{
{
.
chip
=
{
.
base
=
S5PV210_GPA0
(
0
),
.
ngpio
=
S5PV210_GPIO_A0_NR
,
.
label
=
"GPA0"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPA1
(
0
),
.
ngpio
=
S5PV210_GPIO_A1_NR
,
.
label
=
"GPA1"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPB
(
0
),
.
ngpio
=
S5PV210_GPIO_B_NR
,
.
label
=
"GPB"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPC0
(
0
),
.
ngpio
=
S5PV210_GPIO_C0_NR
,
.
label
=
"GPC0"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPC1
(
0
),
.
ngpio
=
S5PV210_GPIO_C1_NR
,
.
label
=
"GPC1"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPD0
(
0
),
.
ngpio
=
S5PV210_GPIO_D0_NR
,
.
label
=
"GPD0"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPD1
(
0
),
.
ngpio
=
S5PV210_GPIO_D1_NR
,
.
label
=
"GPD1"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPE0
(
0
),
.
ngpio
=
S5PV210_GPIO_E0_NR
,
.
label
=
"GPE0"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPE1
(
0
),
.
ngpio
=
S5PV210_GPIO_E1_NR
,
.
label
=
"GPE1"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPF0
(
0
),
.
ngpio
=
S5PV210_GPIO_F0_NR
,
.
label
=
"GPF0"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPF1
(
0
),
.
ngpio
=
S5PV210_GPIO_F1_NR
,
.
label
=
"GPF1"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPF2
(
0
),
.
ngpio
=
S5PV210_GPIO_F2_NR
,
.
label
=
"GPF2"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPF3
(
0
),
.
ngpio
=
S5PV210_GPIO_F3_NR
,
.
label
=
"GPF3"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPG0
(
0
),
.
ngpio
=
S5PV210_GPIO_G0_NR
,
.
label
=
"GPG0"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPG1
(
0
),
.
ngpio
=
S5PV210_GPIO_G1_NR
,
.
label
=
"GPG1"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPG2
(
0
),
.
ngpio
=
S5PV210_GPIO_G2_NR
,
.
label
=
"GPG2"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPG3
(
0
),
.
ngpio
=
S5PV210_GPIO_G3_NR
,
.
label
=
"GPG3"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPI
(
0
),
.
ngpio
=
S5PV210_GPIO_I_NR
,
.
label
=
"GPI"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPJ0
(
0
),
.
ngpio
=
S5PV210_GPIO_J0_NR
,
.
label
=
"GPJ0"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPJ1
(
0
),
.
ngpio
=
S5PV210_GPIO_J1_NR
,
.
label
=
"GPJ1"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPJ2
(
0
),
.
ngpio
=
S5PV210_GPIO_J2_NR
,
.
label
=
"GPJ2"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPJ3
(
0
),
.
ngpio
=
S5PV210_GPIO_J3_NR
,
.
label
=
"GPJ3"
,
},
},
{
.
chip
=
{
.
base
=
S5PV210_GPJ4
(
0
),
.
ngpio
=
S5PV210_GPIO_J4_NR
,
.
label
=
"GPJ4"
,
},
},
{
.
config
=
&
gpio_cfg_noint
,
.
chip
=
{
.
base
=
S5PV210_MP01
(
0
),
.
ngpio
=
S5PV210_GPIO_MP01_NR
,
.
label
=
"MP01"
,
},
},
{
.
config
=
&
gpio_cfg_noint
,
.
chip
=
{
.
base
=
S5PV210_MP02
(
0
),
.
ngpio
=
S5PV210_GPIO_MP02_NR
,
.
label
=
"MP02"
,
},
},
{
.
config
=
&
gpio_cfg_noint
,
.
chip
=
{
.
base
=
S5PV210_MP03
(
0
),
.
ngpio
=
S5PV210_GPIO_MP03_NR
,
.
label
=
"MP03"
,
},
},
{
.
base
=
(
S5P_VA_GPIO
+
0xC00
),
.
config
=
&
gpio_cfg_noint
,
.
chip
=
{
.
base
=
S5PV210_GPH0
(
0
),
.
ngpio
=
S5PV210_GPIO_H0_NR
,
.
label
=
"GPH0"
,
},
},
{
.
base
=
(
S5P_VA_GPIO
+
0xC20
),
.
config
=
&
gpio_cfg_noint
,
.
chip
=
{
.
base
=
S5PV210_GPH1
(
0
),
.
ngpio
=
S5PV210_GPIO_H1_NR
,
.
label
=
"GPH1"
,
},
},
{
.
base
=
(
S5P_VA_GPIO
+
0xC40
),
.
config
=
&
gpio_cfg_noint
,
.
chip
=
{
.
base
=
S5PV210_GPH2
(
0
),
.
ngpio
=
S5PV210_GPIO_H2_NR
,
.
label
=
"GPH2"
,
},
},
{
.
base
=
(
S5P_VA_GPIO
+
0xC60
),
.
config
=
&
gpio_cfg_noint
,
.
chip
=
{
.
base
=
S5PV210_GPH3
(
0
),
.
ngpio
=
S5PV210_GPIO_H3_NR
,
.
label
=
"GPH3"
,
},
},
};
static
__init
int
s5pv210_gpiolib_init
(
void
)
{
struct
s3c_gpio_chip
*
chip
=
s5pv210_gpio_4bit
;
int
nr_chips
=
ARRAY_SIZE
(
s5pv210_gpio_4bit
);
int
i
=
0
;
for
(
i
=
0
;
i
<
nr_chips
;
i
++
,
chip
++
)
{
if
(
chip
->
config
==
NULL
)
chip
->
config
=
&
gpio_cfg
;
if
(
chip
->
base
==
NULL
)
chip
->
base
=
S5PV210_BANK_BASE
(
i
);
}
samsung_gpiolib_add_4bit_chips
(
s5pv210_gpio_4bit
,
nr_chips
);
return
0
;
}
core_initcall
(
s5pv210_gpiolib_init
);
arch/arm/mach-s5pv210/include/mach/gpio.h
View file @
359542b2
...
...
@@ -18,6 +18,8 @@
#define gpio_cansleep __gpio_cansleep
#define gpio_to_irq __gpio_to_irq
/* Practically, GPIO banks upto MP03 are the configurable gpio banks */
/* GPIO bank sizes */
#define S5PV210_GPIO_A0_NR (8)
#define S5PV210_GPIO_A1_NR (4)
...
...
@@ -47,6 +49,10 @@
#define S5PV210_GPIO_J3_NR (8)
#define S5PV210_GPIO_J4_NR (5)
#define S5PV210_GPIO_MP01_NR (8)
#define S5PV210_GPIO_MP02_NR (4)
#define S5PV210_GPIO_MP03_NR (8)
/* GPIO bank numbers */
/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
...
...
@@ -85,6 +91,9 @@ enum s5p_gpio_number {
S5PV210_GPIO_J2_START
=
S5PV210_GPIO_NEXT
(
S5PV210_GPIO_J1
),
S5PV210_GPIO_J3_START
=
S5PV210_GPIO_NEXT
(
S5PV210_GPIO_J2
),
S5PV210_GPIO_J4_START
=
S5PV210_GPIO_NEXT
(
S5PV210_GPIO_J3
),
S5PV210_GPIO_MP01_START
=
S5PV210_GPIO_NEXT
(
S5PV210_GPIO_J4
),
S5PV210_GPIO_MP02_START
=
S5PV210_GPIO_NEXT
(
S5PV210_GPIO_MP01
),
S5PV210_GPIO_MP03_START
=
S5PV210_GPIO_NEXT
(
S5PV210_GPIO_MP02
),
};
/* S5PV210 GPIO number definitions */
...
...
@@ -115,13 +124,16 @@ enum s5p_gpio_number {
#define S5PV210_GPJ2(_nr) (S5PV210_GPIO_J2_START + (_nr))
#define S5PV210_GPJ3(_nr) (S5PV210_GPIO_J3_START + (_nr))
#define S5PV210_GPJ4(_nr) (S5PV210_GPIO_J4_START + (_nr))
#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr))
#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr))
#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr))
/* the end of the S5PV210 specific gpios */
#define S5PV210_GPIO_END (S5PV210_
GPJ4(S5PV210_GPIO_J4
_NR) + 1)
#define S5PV210_GPIO_END (S5PV210_
MP03(S5PV210_GPIO_MP03
_NR) + 1)
#define S3C_GPIO_END S5PV210_GPIO_END
/* define the number of gpios we need to the one after the
GPJ4
() range */
#define ARCH_NR_GPIOS (S5PV210_
GPJ4(S5PV210_GPIO_J4
_NR) + \
/* define the number of gpios we need to the one after the
MP03
() range */
#define ARCH_NR_GPIOS (S5PV210_
MP03(S5PV210_GPIO_MP03
_NR) + \
CONFIG_SAMSUNG_GPIO_EXTRA + 1)
#include <asm-generic/gpio.h>
...
...
arch/arm/plat-s5p/include/plat/irqs.h
View file @
359542b2
...
...
@@ -79,7 +79,7 @@
#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
#define S5P_TIMER_IRQ(x)
S5P_IRQ
(11 + (x))
#define S5P_TIMER_IRQ(x) (11 + (x))
#define IRQ_TIMER0 S5P_TIMER_IRQ(0)
#define IRQ_TIMER1 S5P_TIMER_IRQ(1)
...
...
arch/arm/plat-samsung/include/plat/cpu.h
View file @
359542b2
...
...
@@ -78,6 +78,9 @@ extern struct sysdev_class s3c2442_sysclass;
extern
struct
sysdev_class
s3c2443_sysclass
;
extern
struct
sysdev_class
s3c6410_sysclass
;
extern
struct
sysdev_class
s3c64xx_sysclass
;
extern
struct
sysdev_class
s5p6440_sysclass
;
extern
struct
sysdev_class
s5p6442_sysclass
;
extern
struct
sysdev_class
s5pv210_sysclass
;
extern
void
(
*
s5pc1xx_idle
)(
void
);
...
...
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