Commit 35cb3fc0 authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Doug Ledford

cxgb3: simplify iwch_get_dma_wr

Fold simplified versions of build_phys_page_list and
iwch_register_phys_mem into iwch_get_dma_wr now that no other callers
are left.
Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Reviewed-by: default avatarSagi Grimberg <sagig@mellanox.com>
Reviewed-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> [core]
Reviewed-by: default avatarSteve Wise <swise@opengridcomputing.com>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent feb7c1e3
...@@ -99,74 +99,3 @@ int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset) ...@@ -99,74 +99,3 @@ int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset)
return cxio_write_pbl(&mhp->rhp->rdev, pages, return cxio_write_pbl(&mhp->rhp->rdev, pages,
mhp->attr.pbl_addr + (offset << 3), npages); mhp->attr.pbl_addr + (offset << 3), npages);
} }
int build_phys_page_list(struct ib_phys_buf *buffer_list,
int num_phys_buf,
u64 *iova_start,
u64 *total_size,
int *npages,
int *shift,
__be64 **page_list)
{
u64 mask;
int i, j, n;
mask = 0;
*total_size = 0;
for (i = 0; i < num_phys_buf; ++i) {
if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
return -EINVAL;
if (i != 0 && i != num_phys_buf - 1 &&
(buffer_list[i].size & ~PAGE_MASK))
return -EINVAL;
*total_size += buffer_list[i].size;
if (i > 0)
mask |= buffer_list[i].addr;
else
mask |= buffer_list[i].addr & PAGE_MASK;
if (i != num_phys_buf - 1)
mask |= buffer_list[i].addr + buffer_list[i].size;
else
mask |= (buffer_list[i].addr + buffer_list[i].size +
PAGE_SIZE - 1) & PAGE_MASK;
}
if (*total_size > 0xFFFFFFFFULL)
return -ENOMEM;
/* Find largest page shift we can use to cover buffers */
for (*shift = PAGE_SHIFT; *shift < 27; ++(*shift))
if ((1ULL << *shift) & mask)
break;
buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1);
buffer_list[0].addr &= ~0ull << *shift;
*npages = 0;
for (i = 0; i < num_phys_buf; ++i)
*npages += (buffer_list[i].size +
(1ULL << *shift) - 1) >> *shift;
if (!*npages)
return -EINVAL;
*page_list = kmalloc(sizeof(u64) * *npages, GFP_KERNEL);
if (!*page_list)
return -ENOMEM;
n = 0;
for (i = 0; i < num_phys_buf; ++i)
for (j = 0;
j < (buffer_list[i].size + (1ULL << *shift) - 1) >> *shift;
++j)
(*page_list)[n++] = cpu_to_be64(buffer_list[i].addr +
((u64) j << *shift));
PDBG("%s va 0x%llx mask 0x%llx shift %d len %lld pbl_size %d\n",
__func__, (unsigned long long) *iova_start,
(unsigned long long) mask, *shift, (unsigned long long) *total_size,
*npages);
return 0;
}
...@@ -479,24 +479,25 @@ static int iwch_dereg_mr(struct ib_mr *ib_mr) ...@@ -479,24 +479,25 @@ static int iwch_dereg_mr(struct ib_mr *ib_mr)
return 0; return 0;
} }
static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd, static struct ib_mr *iwch_get_dma_mr(struct ib_pd *pd, int acc)
struct ib_phys_buf *buffer_list,
int num_phys_buf,
int acc,
u64 *iova_start)
{ {
__be64 *page_list; const u64 total_size = 0xffffffff;
int shift; const u64 mask = (total_size + PAGE_SIZE - 1) & PAGE_MASK;
u64 total_size; struct iwch_pd *php = to_iwch_pd(pd);
int npages; struct iwch_dev *rhp = php->rhp;
struct iwch_dev *rhp;
struct iwch_pd *php;
struct iwch_mr *mhp; struct iwch_mr *mhp;
int ret; __be64 *page_list;
int shift = 26, npages, ret, i;
PDBG("%s ib_pd %p\n", __func__, pd); PDBG("%s ib_pd %p\n", __func__, pd);
php = to_iwch_pd(pd);
rhp = php->rhp; /*
* T3 only supports 32 bits of size.
*/
if (sizeof(phys_addr_t) > 4) {
pr_warn_once(MOD "Cannot support dma_mrs on this platform.\n");
return ERR_PTR(-ENOTSUPP);
}
mhp = kzalloc(sizeof(*mhp), GFP_KERNEL); mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);
if (!mhp) if (!mhp)
...@@ -504,22 +505,23 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd, ...@@ -504,22 +505,23 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
mhp->rhp = rhp; mhp->rhp = rhp;
/* First check that we have enough alignment */ npages = (total_size + (1ULL << shift) - 1) >> shift;
if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK)) { if (!npages) {
ret = -EINVAL; ret = -EINVAL;
goto err; goto err;
} }
if (num_phys_buf > 1 && page_list = kmalloc_array(npages, sizeof(u64), GFP_KERNEL);
((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK)) { if (!page_list) {
ret = -EINVAL; ret = -ENOMEM;
goto err; goto err;
} }
ret = build_phys_page_list(buffer_list, num_phys_buf, iova_start, for (i = 0; i < npages; i++)
&total_size, &npages, &shift, &page_list); page_list[i] = cpu_to_be64((u64)i << shift);
if (ret)
goto err; PDBG("%s mask 0x%llx shift %d len %lld pbl_size %d\n",
__func__, mask, shift, total_size, npages);
ret = iwch_alloc_pbl(mhp, npages); ret = iwch_alloc_pbl(mhp, npages);
if (ret) { if (ret) {
...@@ -536,7 +538,7 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd, ...@@ -536,7 +538,7 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
mhp->attr.zbva = 0; mhp->attr.zbva = 0;
mhp->attr.perms = iwch_ib_to_tpt_access(acc); mhp->attr.perms = iwch_ib_to_tpt_access(acc);
mhp->attr.va_fbo = *iova_start; mhp->attr.va_fbo = 0;
mhp->attr.page_size = shift - 12; mhp->attr.page_size = shift - 12;
mhp->attr.len = (u32) total_size; mhp->attr.len = (u32) total_size;
...@@ -553,7 +555,6 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd, ...@@ -553,7 +555,6 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
err: err:
kfree(mhp); kfree(mhp);
return ERR_PTR(ret); return ERR_PTR(ret);
} }
static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
...@@ -659,28 +660,6 @@ static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, ...@@ -659,28 +660,6 @@ static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
return ERR_PTR(err); return ERR_PTR(err);
} }
static struct ib_mr *iwch_get_dma_mr(struct ib_pd *pd, int acc)
{
struct ib_phys_buf bl;
u64 kva;
struct ib_mr *ibmr;
PDBG("%s ib_pd %p\n", __func__, pd);
/*
* T3 only supports 32 bits of size.
*/
if (sizeof(phys_addr_t) > 4) {
pr_warn_once(MOD "Cannot support dma_mrs on this platform.\n");
return ERR_PTR(-ENOTSUPP);
}
bl.size = 0xffffffff;
bl.addr = 0;
kva = 0;
ibmr = iwch_register_phys_mem(pd, &bl, 1, acc, &kva);
return ibmr;
}
static struct ib_mw *iwch_alloc_mw(struct ib_pd *pd, enum ib_mw_type type) static struct ib_mw *iwch_alloc_mw(struct ib_pd *pd, enum ib_mw_type type)
{ {
struct iwch_dev *rhp; struct iwch_dev *rhp;
......
...@@ -341,14 +341,6 @@ int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php, ...@@ -341,14 +341,6 @@ int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
int iwch_alloc_pbl(struct iwch_mr *mhp, int npages); int iwch_alloc_pbl(struct iwch_mr *mhp, int npages);
void iwch_free_pbl(struct iwch_mr *mhp); void iwch_free_pbl(struct iwch_mr *mhp);
int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset); int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset);
int build_phys_page_list(struct ib_phys_buf *buffer_list,
int num_phys_buf,
u64 *iova_start,
u64 *total_size,
int *npages,
int *shift,
__be64 **page_list);
#define IWCH_NODE_DESC "cxgb3 Chelsio Communications" #define IWCH_NODE_DESC "cxgb3 Chelsio Communications"
......
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