Commit 361da7c3 authored by Christian König's avatar Christian König

drm/ttm: enable TTM page pool kerneldoc

Fix the remaining warnings and finally enable this.
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210908132933.3269-9-christian.koenig@amd.com
parent 4f4859d0
...@@ -67,6 +67,15 @@ TTM TT object reference ...@@ -67,6 +67,15 @@ TTM TT object reference
.. kernel-doc:: drivers/gpu/drm/ttm/ttm_tt.c .. kernel-doc:: drivers/gpu/drm/ttm/ttm_tt.c
:export: :export:
TTM page pool reference
-----------------------
.. kernel-doc:: include/drm/ttm/ttm_pool.h
:internal:
.. kernel-doc:: drivers/gpu/drm/ttm/ttm_pool.c
:export:
The Graphics Execution Manager (GEM) The Graphics Execution Manager (GEM)
==================================== ====================================
......
...@@ -37,7 +37,7 @@ struct ttm_pool; ...@@ -37,7 +37,7 @@ struct ttm_pool;
struct ttm_operation_ctx; struct ttm_operation_ctx;
/** /**
* ttm_pool_type - Pool for a certain memory type * struct ttm_pool_type - Pool for a certain memory type
* *
* @pool: the pool we belong to, might be NULL for the global ones * @pool: the pool we belong to, might be NULL for the global ones
* @order: the allocation order our pages have * @order: the allocation order our pages have
...@@ -58,8 +58,9 @@ struct ttm_pool_type { ...@@ -58,8 +58,9 @@ struct ttm_pool_type {
}; };
/** /**
* ttm_pool - Pool for all caching and orders * struct ttm_pool - Pool for all caching and orders
* *
* @dev: the device we allocate pages for
* @use_dma_alloc: if coherent DMA allocations should be used * @use_dma_alloc: if coherent DMA allocations should be used
* @use_dma32: if GFP_DMA32 should be used * @use_dma32: if GFP_DMA32 should be used
* @caching: pools for each caching/order * @caching: pools for each caching/order
......
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