Commit 372cf591 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson

arm64: dts: qcom: adjust whitespace around '='

Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment.  No functional
changes (same DTB).
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220526204248.832139-1-krzysztof.kozlowski@linaro.org
parent 6dfe4e19
...@@ -20,11 +20,11 @@ aliases { ...@@ -20,11 +20,11 @@ aliases {
serial0 = &blsp1_uart2; serial0 = &blsp1_uart2;
serial1 = &blsp1_uart1; serial1 = &blsp1_uart1;
usid0 = &pm8916_0; usid0 = &pm8916_0;
i2c0 = &blsp_i2c2; i2c0 = &blsp_i2c2;
i2c1 = &blsp_i2c6; i2c1 = &blsp_i2c6;
i2c3 = &blsp_i2c4; i2c3 = &blsp_i2c4;
spi0 = &blsp_spi5; spi0 = &blsp_spi5;
spi1 = &blsp_spi3; spi1 = &blsp_spi3;
}; };
chosen { chosen {
......
...@@ -49,11 +49,11 @@ aliases { ...@@ -49,11 +49,11 @@ aliases {
serial0 = &blsp2_uart2; serial0 = &blsp2_uart2;
serial1 = &blsp2_uart3; serial1 = &blsp2_uart3;
serial2 = &blsp1_uart2; serial2 = &blsp1_uart2;
i2c0 = &blsp1_i2c3; i2c0 = &blsp1_i2c3;
i2c1 = &blsp2_i2c1; i2c1 = &blsp2_i2c1;
i2c2 = &blsp2_i2c1; i2c2 = &blsp2_i2c1;
spi0 = &blsp1_spi1; spi0 = &blsp1_spi1;
spi1 = &blsp2_spi6; spi1 = &blsp2_spi6;
}; };
chosen { chosen {
...@@ -958,7 +958,7 @@ dai@2 { ...@@ -958,7 +958,7 @@ dai@2 {
&sound { &sound {
compatible = "qcom,apq8096-sndcard"; compatible = "qcom,apq8096-sndcard";
model = "DB820c"; model = "DB820c";
audio-routing = "RX_BIAS", "MCLK", audio-routing = "RX_BIAS", "MCLK",
"MM_DL1", "MultiMedia1 Playback", "MM_DL1", "MultiMedia1 Playback",
"MM_DL2", "MultiMedia2 Playback", "MM_DL2", "MultiMedia2 Playback",
"MultiMedia3 Capture", "MM_UL3"; "MultiMedia3 Capture", "MM_UL3";
......
...@@ -321,7 +321,7 @@ i2c_0: i2c@78b6000 { ...@@ -321,7 +321,7 @@ i2c_0: i2c@78b6000 {
clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>; <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface"; clock-names = "core", "iface";
clock-frequency = <400000>; clock-frequency = <400000>;
dmas = <&blsp_dma 14>, <&blsp_dma 15>; dmas = <&blsp_dma 14>, <&blsp_dma 15>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
status = "disabled"; status = "disabled";
...@@ -336,7 +336,7 @@ i2c_1: i2c@78b7000 { /* BLSP1 QUP2 */ ...@@ -336,7 +336,7 @@ i2c_1: i2c@78b7000 { /* BLSP1 QUP2 */
clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>, clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>; <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface"; clock-names = "core", "iface";
clock-frequency = <400000>; clock-frequency = <400000>;
dmas = <&blsp_dma 16>, <&blsp_dma 17>; dmas = <&blsp_dma 16>, <&blsp_dma 17>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
status = "disabled"; status = "disabled";
......
...@@ -119,7 +119,7 @@ ssphy_1: phy@58000 { ...@@ -119,7 +119,7 @@ ssphy_1: phy@58000 {
<&xo>; <&xo>;
clock-names = "aux", "cfg_ahb", "ref"; clock-names = "aux", "cfg_ahb", "ref";
resets = <&gcc GCC_USB1_PHY_BCR>, resets = <&gcc GCC_USB1_PHY_BCR>,
<&gcc GCC_USB3PHY_1_PHY_BCR>; <&gcc GCC_USB3PHY_1_PHY_BCR>;
reset-names = "phy","common"; reset-names = "phy","common";
status = "disabled"; status = "disabled";
...@@ -162,7 +162,7 @@ ssphy_0: phy@78000 { ...@@ -162,7 +162,7 @@ ssphy_0: phy@78000 {
<&xo>; <&xo>;
clock-names = "aux", "cfg_ahb", "ref"; clock-names = "aux", "cfg_ahb", "ref";
resets = <&gcc GCC_USB0_PHY_BCR>, resets = <&gcc GCC_USB0_PHY_BCR>,
<&gcc GCC_USB3PHY_0_PHY_BCR>; <&gcc GCC_USB3PHY_0_PHY_BCR>;
reset-names = "phy","common"; reset-names = "phy","common";
status = "disabled"; status = "disabled";
......
...@@ -156,7 +156,7 @@ &slpi_pil { ...@@ -156,7 +156,7 @@ &slpi_pil {
&sound { &sound {
compatible = "qcom,apq8096-sndcard"; compatible = "qcom,apq8096-sndcard";
model = "gemini"; model = "gemini";
audio-routing = "RX_BIAS", "MCLK", audio-routing = "RX_BIAS", "MCLK",
"MM_DL1", "MultiMedia1 Playback", "MM_DL1", "MultiMedia1 Playback",
"MM_DL2", "MultiMedia2 Playback", "MM_DL2", "MultiMedia2 Playback",
"MultiMedia3 Capture", "MM_UL3"; "MultiMedia3 Capture", "MM_UL3";
......
...@@ -137,7 +137,7 @@ &slpi_pil { ...@@ -137,7 +137,7 @@ &slpi_pil {
&sound { &sound {
compatible = "qcom,apq8096-sndcard"; compatible = "qcom,apq8096-sndcard";
model = "scorpio"; model = "scorpio";
audio-routing = "RX_BIAS", "MCLK"; audio-routing = "RX_BIAS", "MCLK";
mm1-dai-link { mm1-dai-link {
link-name = "MultiMedia1"; link-name = "MultiMedia1";
......
...@@ -1017,7 +1017,7 @@ gpu: gpu@b00000 { ...@@ -1017,7 +1017,7 @@ gpu: gpu@b00000 {
#cooling-cells = <2>; #cooling-cells = <2>;
gpu_opp_table: opp-table { gpu_opp_table: opp-table {
compatible ="operating-points-v2"; compatible = "operating-points-v2";
/* /*
* 624Mhz and 560Mhz are only available on speed * 624Mhz and 560Mhz are only available on speed
...@@ -1639,7 +1639,7 @@ pcie0: pcie@600000 { ...@@ -1639,7 +1639,7 @@ pcie0: pcie@600000 {
<&gcc GCC_PCIE_0_MSTR_AXI_CLK>, <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_0_SLV_AXI_CLK>; <&gcc GCC_PCIE_0_SLV_AXI_CLK>;
clock-names = "pipe", clock-names = "pipe",
"aux", "aux",
"cfg", "cfg",
"bus_master", "bus_master",
...@@ -1653,7 +1653,7 @@ pcie1: pcie@608000 { ...@@ -1653,7 +1653,7 @@ pcie1: pcie@608000 {
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
num-lanes = <1>; num-lanes = <1>;
status = "disabled"; status = "disabled";
reg = <0x00608000 0x2000>, reg = <0x00608000 0x2000>,
<0x0d000000 0xf1d>, <0x0d000000 0xf1d>,
...@@ -1693,7 +1693,7 @@ pcie1: pcie@608000 { ...@@ -1693,7 +1693,7 @@ pcie1: pcie@608000 {
<&gcc GCC_PCIE_1_MSTR_AXI_CLK>, <&gcc GCC_PCIE_1_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_1_SLV_AXI_CLK>; <&gcc GCC_PCIE_1_SLV_AXI_CLK>;
clock-names = "pipe", clock-names = "pipe",
"aux", "aux",
"cfg", "cfg",
"bus_master", "bus_master",
...@@ -1743,7 +1743,7 @@ pcie2: pcie@610000 { ...@@ -1743,7 +1743,7 @@ pcie2: pcie@610000 {
<&gcc GCC_PCIE_2_MSTR_AXI_CLK>, <&gcc GCC_PCIE_2_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_2_SLV_AXI_CLK>; <&gcc GCC_PCIE_2_SLV_AXI_CLK>;
clock-names = "pipe", clock-names = "pipe",
"aux", "aux",
"cfg", "cfg",
"bus_master", "bus_master",
...@@ -3102,7 +3102,7 @@ slimbam: dma-controller@9184000 { ...@@ -3102,7 +3102,7 @@ slimbam: dma-controller@9184000 {
compatible = "qcom,bam-v1.7.0"; compatible = "qcom,bam-v1.7.0";
qcom,controlled-remotely; qcom,controlled-remotely;
reg = <0x09184000 0x32000>; reg = <0x09184000 0x32000>;
num-channels = <31>; num-channels = <31>;
interrupts = <0 164 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 164 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>; #dma-cells = <1>;
qcom,ee = <1>; qcom,ee = <1>;
...@@ -3114,7 +3114,7 @@ slim_msm: slim@91c0000 { ...@@ -3114,7 +3114,7 @@ slim_msm: slim@91c0000 {
reg = <0x091c0000 0x2C000>; reg = <0x091c0000 0x2C000>;
reg-names = "ctrl"; reg-names = "ctrl";
interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&slimbam 3>, <&slimbam 4>, dmas = <&slimbam 3>, <&slimbam 4>,
<&slimbam 5>, <&slimbam 6>; <&slimbam 5>, <&slimbam 6>;
dma-names = "rx", "tx", "tx2", "rx2"; dma-names = "rx", "tx", "tx2", "rx2";
#address-cells = <1>; #address-cells = <1>;
...@@ -3126,7 +3126,7 @@ ngd@1 { ...@@ -3126,7 +3126,7 @@ ngd@1 {
tasha_ifd: tas-ifd { tasha_ifd: tas-ifd {
compatible = "slim217,1a0"; compatible = "slim217,1a0";
reg = <0 0>; reg = <0 0>;
}; };
wcd9335: codec@1{ wcd9335: codec@1{
...@@ -3134,17 +3134,17 @@ wcd9335: codec@1{ ...@@ -3134,17 +3134,17 @@ wcd9335: codec@1{
pinctrl-names = "default"; pinctrl-names = "default";
compatible = "slim217,1a0"; compatible = "slim217,1a0";
reg = <1 0>; reg = <1 0>;
interrupt-parent = <&tlmm>; interrupt-parent = <&tlmm>;
interrupts = <54 IRQ_TYPE_LEVEL_HIGH>, interrupts = <54 IRQ_TYPE_LEVEL_HIGH>,
<53 IRQ_TYPE_LEVEL_HIGH>; <53 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "intr1", "intr2"; interrupt-names = "intr1", "intr2";
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <1>;
reset-gpios = <&tlmm 64 0>; reset-gpios = <&tlmm 64 0>;
slim-ifc-dev = <&tasha_ifd>; slim-ifc-dev = <&tasha_ifd>;
#sound-dai-cells = <1>; #sound-dai-cells = <1>;
}; };
......
...@@ -929,7 +929,7 @@ pcie0: pci@1c00000 { ...@@ -929,7 +929,7 @@ pcie0: pci@1c00000 {
interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi"; interrupt-names = "msi";
interrupt-map-mask = <0 0 0 0x7>; interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 0 135 IRQ_TYPE_LEVEL_HIGH>, interrupt-map = <0 0 0 1 &intc 0 0 135 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &intc 0 0 136 IRQ_TYPE_LEVEL_HIGH>, <0 0 0 2 &intc 0 0 136 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &intc 0 0 138 IRQ_TYPE_LEVEL_HIGH>, <0 0 0 3 &intc 0 0 138 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &intc 0 0 139 IRQ_TYPE_LEVEL_HIGH>; <0 0 0 4 &intc 0 0 139 IRQ_TYPE_LEVEL_HIGH>;
...@@ -1389,7 +1389,7 @@ adreno_gpu: gpu@5000000 { ...@@ -1389,7 +1389,7 @@ adreno_gpu: gpu@5000000 {
status = "disabled"; status = "disabled";
gpu_opp_table: opp-table { gpu_opp_table: opp-table {
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp-710000097 { opp-710000097 {
opp-hz = /bits/ 64 <710000097>; opp-hz = /bits/ 64 <710000097>;
opp-level = <RPM_SMD_LEVEL_TURBO>; opp-level = <RPM_SMD_LEVEL_TURBO>;
......
...@@ -915,7 +915,7 @@ platform { ...@@ -915,7 +915,7 @@ platform {
}; };
codec { codec {
sound-dai = <&lt9611_codec 0>; sound-dai = <&lt9611_codec 0>;
}; };
}; };
......
...@@ -389,7 +389,7 @@ &sdhc_2 { ...@@ -389,7 +389,7 @@ &sdhc_2 {
pinctrl-names = "default","sleep"; pinctrl-names = "default","sleep";
pinctrl-0 = <&sdc2_on>; pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>; pinctrl-1 = <&sdc2_off>;
vmmc-supply = <&vreg_l9c_2p9>; vmmc-supply = <&vreg_l9c_2p9>;
vqmmc-supply = <&vreg_l6c_2p9>; vqmmc-supply = <&vreg_l6c_2p9>;
cd-gpios = <&tlmm 69 GPIO_ACTIVE_LOW>; cd-gpios = <&tlmm 69 GPIO_ACTIVE_LOW>;
......
...@@ -2048,7 +2048,7 @@ adreno_smmu: iommu@5040000 { ...@@ -2048,7 +2048,7 @@ adreno_smmu: iommu@5040000 {
}; };
gmu: gmu@506a000 { gmu: gmu@506a000 {
compatible="qcom,adreno-gmu-618.0", "qcom,adreno-gmu"; compatible = "qcom,adreno-gmu-618.0", "qcom,adreno-gmu";
reg = <0 0x0506a000 0 0x31000>, <0 0x0b290000 0 0x10000>, reg = <0 0x0506a000 0 0x31000>, <0 0x0b290000 0 0x10000>,
<0 0x0b490000 0 0x10000>; <0 0x0b490000 0 0x10000>;
reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq"; reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
...@@ -3579,7 +3579,7 @@ lpass_cpu: lpass@62d87000 { ...@@ -3579,7 +3579,7 @@ lpass_cpu: lpass@62d87000 {
compatible = "qcom,sc7180-lpass-cpu"; compatible = "qcom,sc7180-lpass-cpu";
reg = <0 0x62d87000 0 0x68000>, <0 0x62f00000 0 0x29000>; reg = <0 0x62d87000 0 0x68000>, <0 0x62f00000 0 0x29000>;
reg-names = "lpass-hdmiif", "lpass-lpaif"; reg-names = "lpass-hdmiif", "lpass-lpaif";
iommus = <&apps_smmu 0x1020 0>, iommus = <&apps_smmu 0x1020 0>,
<&apps_smmu 0x1021 0>, <&apps_smmu 0x1021 0>,
......
...@@ -2201,7 +2201,7 @@ lpass_aon: clock-controller@3380000 { ...@@ -2201,7 +2201,7 @@ lpass_aon: clock-controller@3380000 {
lpasscore: clock-controller@3900000 { lpasscore: clock-controller@3900000 {
compatible = "qcom,sc7280-lpasscorecc"; compatible = "qcom,sc7280-lpasscorecc";
reg = <0 0x03900000 0 0x50000>; reg = <0 0x03900000 0 0x50000>;
clocks = <&rpmhcc RPMH_CXO_CLK>; clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "bi_tcxo"; clock-names = "bi_tcxo";
power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>; power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>;
#clock-cells = <1>; #clock-cells = <1>;
...@@ -2397,7 +2397,7 @@ opp-900000000 { ...@@ -2397,7 +2397,7 @@ opp-900000000 {
}; };
gmu: gmu@3d6a000 { gmu: gmu@3d6a000 {
compatible="qcom,adreno-gmu-635.0", "qcom,adreno-gmu"; compatible = "qcom,adreno-gmu-635.0", "qcom,adreno-gmu";
reg = <0 0x03d6a000 0 0x34000>, reg = <0 0x03d6a000 0 0x34000>,
<0 0x3de0000 0 0x10000>, <0 0x3de0000 0 0x10000>,
<0 0x0b290000 0 0x10000>; <0 0x0b290000 0 0x10000>;
...@@ -3820,7 +3820,7 @@ mdss_dp: displayport-controller@ae90000 { ...@@ -3820,7 +3820,7 @@ mdss_dp: displayport-controller@ae90000 {
<&dispcc DISP_CC_MDSS_DP_LINK_CLK>, <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>; <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
clock-names = "core_iface", clock-names = "core_iface",
"core_aux", "core_aux",
"ctrl_link", "ctrl_link",
"ctrl_link_iface", "ctrl_link_iface",
......
...@@ -34,7 +34,7 @@ framebuffer0: framebuffer@9d400000 { ...@@ -34,7 +34,7 @@ framebuffer0: framebuffer@9d400000 {
height = <1920>; height = <1920>;
stride = <(1080 * 4)>; stride = <(1080 * 4)>;
format = "a8r8g8b8"; format = "a8r8g8b8";
status= "okay"; status = "okay";
}; };
}; };
......
...@@ -1042,7 +1042,7 @@ adreno_gpu: gpu@5000000 { ...@@ -1042,7 +1042,7 @@ adreno_gpu: gpu@5000000 {
status = "disabled"; status = "disabled";
gpu_sdm630_opp_table: opp-table { gpu_sdm630_opp_table: opp-table {
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp-775000000 { opp-775000000 {
opp-hz = /bits/ 64 <775000000>; opp-hz = /bits/ 64 <775000000>;
opp-level = <RPM_SMD_LEVEL_TURBO>; opp-level = <RPM_SMD_LEVEL_TURBO>;
......
...@@ -14,7 +14,7 @@ &adreno_gpu { ...@@ -14,7 +14,7 @@ &adreno_gpu {
operating-points-v2 = <&gpu_sdm660_opp_table>; operating-points-v2 = <&gpu_sdm660_opp_table>;
gpu_sdm660_opp_table: opp-table { gpu_sdm660_opp_table: opp-table {
compatible = "operating-points-v2"; compatible = "operating-points-v2";
/* /*
* 775MHz is only available on the highest speed bin * 775MHz is only available on the highest speed bin
......
...@@ -130,7 +130,7 @@ pen-insert { ...@@ -130,7 +130,7 @@ pen-insert {
}; };
panel: panel { panel: panel {
compatible ="innolux,p120zdg-bf1"; compatible = "innolux,p120zdg-bf1";
power-supply = <&pp3300_dx_edp>; power-supply = <&pp3300_dx_edp>;
backlight = <&backlight>; backlight = <&backlight>;
no-hpd; no-hpd;
......
...@@ -718,7 +718,7 @@ platform { ...@@ -718,7 +718,7 @@ platform {
}; };
codec { codec {
sound-dai = <&lt9611_codec 0>; sound-dai = <&lt9611_codec 0>;
}; };
}; };
...@@ -733,7 +733,7 @@ platform { ...@@ -733,7 +733,7 @@ platform {
}; };
codec { codec {
sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
}; };
}; };
......
...@@ -468,7 +468,7 @@ zap-shader { ...@@ -468,7 +468,7 @@ zap-shader {
}; };
&i2c5 { &i2c5 {
status="okay"; status = "okay";
touchscreen@38 { touchscreen@38 {
compatible = "focaltech,fts8719"; compatible = "focaltech,fts8719";
......
...@@ -419,7 +419,7 @@ platform { ...@@ -419,7 +419,7 @@ platform {
}; };
codec { codec {
sound-dai = <&wcd9340 0>; sound-dai = <&wcd9340 0>;
}; };
}; };
......
...@@ -3640,7 +3640,7 @@ slim: slim@171c0000 { ...@@ -3640,7 +3640,7 @@ slim: slim@171c0000 {
qcom,apps-ch-pipes = <0x780000>; qcom,apps-ch-pipes = <0x780000>;
qcom,ea-pc = <0x270>; qcom,ea-pc = <0x270>;
status = "okay"; status = "okay";
dmas = <&slimbam 3>, <&slimbam 4>, dmas = <&slimbam 3>, <&slimbam 4>,
<&slimbam 5>, <&slimbam 6>; <&slimbam 5>, <&slimbam 6>;
dma-names = "rx", "tx", "tx2", "rx2"; dma-names = "rx", "tx", "tx2", "rx2";
...@@ -3655,13 +3655,13 @@ ngd@1 { ...@@ -3655,13 +3655,13 @@ ngd@1 {
wcd9340_ifd: ifd@0{ wcd9340_ifd: ifd@0{
compatible = "slim217,250"; compatible = "slim217,250";
reg = <0 0>; reg = <0 0>;
}; };
wcd9340: codec@1{ wcd9340: codec@1{
compatible = "slim217,250"; compatible = "slim217,250";
reg = <1 0>; reg = <1 0>;
slim-ifc-dev = <&wcd9340_ifd>; slim-ifc-dev = <&wcd9340_ifd>;
#sound-dai-cells = <1>; #sound-dai-cells = <1>;
...@@ -3692,8 +3692,8 @@ swm: swm@c85 { ...@@ -3692,8 +3692,8 @@ swm: swm@c85 {
reg = <0xc85 0x40>; reg = <0xc85 0x40>;
interrupts-extended = <&wcd9340 20>; interrupts-extended = <&wcd9340 20>;
qcom,dout-ports = <6>; qcom,dout-ports = <6>;
qcom,din-ports = <2>; qcom,din-ports = <2>;
qcom,ports-sinterval-low =/bits/ 8 <0x07 0x1F 0x3F 0x7 0x1F 0x3F 0x0F 0x0F>; qcom,ports-sinterval-low =/bits/ 8 <0x07 0x1F 0x3F 0x7 0x1F 0x3F 0x0F 0x0F>;
qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0C 0x6 0x12 0x0D 0x07 0x0A >; qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0C 0x6 0x12 0x0D 0x07 0x0A >;
qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1F 0x00 0x00 0x1F 0x00 0x00>; qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1F 0x00 0x00 0x1F 0x00 0x00>;
...@@ -4569,7 +4569,7 @@ adreno_smmu: iommu@5040000 { ...@@ -4569,7 +4569,7 @@ adreno_smmu: iommu@5040000 {
}; };
gmu: gmu@506a000 { gmu: gmu@506a000 {
compatible="qcom,adreno-gmu-630.2", "qcom,adreno-gmu"; compatible = "qcom,adreno-gmu-630.2", "qcom,adreno-gmu";
reg = <0 0x506a000 0 0x30000>, reg = <0 0x506a000 0 0x30000>,
<0 0xb280000 0 0x10000>, <0 0xb280000 0 0x10000>,
...@@ -4934,7 +4934,7 @@ slimbam: dma-controller@17184000 { ...@@ -4934,7 +4934,7 @@ slimbam: dma-controller@17184000 {
compatible = "qcom,bam-v1.7.0"; compatible = "qcom,bam-v1.7.0";
qcom,controlled-remotely; qcom,controlled-remotely;
reg = <0 0x17184000 0 0x2a000>; reg = <0 0x17184000 0 0x2a000>;
num-channels = <31>; num-channels = <31>;
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>; #dma-cells = <1>;
qcom,ee = <1>; qcom,ee = <1>;
......
...@@ -581,7 +581,7 @@ platform { ...@@ -581,7 +581,7 @@ platform {
}; };
codec { codec {
sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
}; };
}; };
...@@ -611,7 +611,7 @@ platform { ...@@ -611,7 +611,7 @@ platform {
}; };
codec { codec {
sound-dai = <&wcd9340 2>; sound-dai = <&wcd9340 2>;
}; };
}; };
}; };
...@@ -817,5 +817,5 @@ &wifi { ...@@ -817,5 +817,5 @@ &wifi {
&crypto { &crypto {
/* FIXME: qce_start triggers an SError */ /* FIXME: qce_start triggers an SError */
status= "disable"; status = "disable";
}; };
...@@ -509,7 +509,7 @@ platform { ...@@ -509,7 +509,7 @@ platform {
}; };
codec { codec {
sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
}; };
}; };
...@@ -539,7 +539,7 @@ platform { ...@@ -539,7 +539,7 @@ platform {
}; };
codec { codec {
sound-dai = <&wcd9340 2>; sound-dai = <&wcd9340 2>;
}; };
}; };
}; };
......
...@@ -2187,7 +2187,7 @@ opp-257000000 { ...@@ -2187,7 +2187,7 @@ opp-257000000 {
}; };
gmu: gmu@2c6a000 { gmu: gmu@2c6a000 {
compatible="qcom,adreno-gmu-640.1", "qcom,adreno-gmu"; compatible = "qcom,adreno-gmu-640.1", "qcom,adreno-gmu";
reg = <0 0x02c6a000 0 0x30000>, reg = <0 0x02c6a000 0 0x30000>,
<0 0x0b290000 0 0x10000>, <0 0x0b290000 0 0x10000>,
......
...@@ -2569,7 +2569,7 @@ opp-305000000 { ...@@ -2569,7 +2569,7 @@ opp-305000000 {
}; };
gmu: gmu@3d6a000 { gmu: gmu@3d6a000 {
compatible="qcom,adreno-gmu-650.2", "qcom,adreno-gmu"; compatible = "qcom,adreno-gmu-650.2", "qcom,adreno-gmu";
reg = <0 0x03d6a000 0 0x30000>, reg = <0 0x03d6a000 0 0x30000>,
<0 0x3de0000 0 0x10000>, <0 0x3de0000 0 0x10000>,
......
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