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Commit 387720c9 authored by Marc Zyngier's avatar Marc Zyngier Committed by Arnd Bergmann
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ARM: DTS: Fix register map for virt-capable GIC 

Since everybody copied my own mistake from the DT binding example,
let's address all the offenders in one swift go.

Most of them got the CPU interface size wrong (4kB, while it should
be 8kB), except for both keystone platforms which got the control
interface wrong (4kB instead of 8kB).

In a few cases where I knew for sure what implementation was used,
I've added the "arm,gic-400" compatible string. I'm 99% sure that
this is what everyone is using, but short of having the TRM for
all the other SoCs, I've left them alone.
Acked-by: default avatarShawn Guo <shawnguo@kernel.org>
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Acked-by: default avatarSantosh Shilimkar <ssantosh@kernel.org>
Acked-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: default avatarAntoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Acked-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
Acked-by: default avatarHeiko Stuebner <heiko@sntech.de>
Reviewed-by: default avatarJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 1defa60e
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Showing with 43 additions and 43 deletions
arch/arm/boot/dts/alpine.dtsi
View file @ 387720c9
......@@ -93,7 +93,7 @@ gic: gic@fb001000 {
interrupt-controller;
reg = <0x0 0xfb001000 0x0 0x1000>,
<0x0 0xfb002000 0x0 0x2000>,
<0x0 0xfb004000 0x0 0x1000>,
<0x0 0xfb004000 0x0 0x2000>,
<0x0 0xfb006000 0x0 0x2000>;
interrupts =
<GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
......
arch/arm/boot/dts/axm55xx.dtsi
View file @ 387720c9
......@@ -62,7 +62,7 @@ gic: interrupt-controller@2001001000 {
#address-cells = <0>;
interrupt-controller;
reg = <0x20 0x01001000 0 0x1000>,
<0x20 0x01002000 0 0x1000>,
<0x20 0x01002000 0 0x2000>,
<0x20 0x01004000 0 0x2000>,
<0x20 0x01006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
......
arch/arm/boot/dts/dra7.dtsi
View file @ 387720c9
......@@ -57,7 +57,7 @@ gic: interrupt-controller@48211000 {
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x0 0x48211000 0x0 0x1000>,
<0x0 0x48212000 0x0 0x1000>,
<0x0 0x48212000 0x0 0x2000>,
<0x0 0x48214000 0x0 0x2000>,
<0x0 0x48216000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
......
arch/arm/boot/dts/ecx-2000.dts
View file @ 387720c9
......@@ -99,7 +99,7 @@ intc: interrupt-controller@fff11000 {
interrupt-controller;
interrupts = <1 9 0xf04>;
reg = <0xfff11000 0x1000>,
<0xfff12000 0x1000>,
<0xfff12000 0x2000>,
<0xfff14000 0x2000>,
<0xfff16000 0x2000>;
};
......
arch/arm/boot/dts/exynos3250.dtsi
View file @ 387720c9
......@@ -234,7 +234,7 @@ gic: interrupt-controller@10481000 {
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10481000 0x1000>,
<0x10482000 0x1000>,
<0x10482000 0x2000>,
<0x10484000 0x2000>,
<0x10486000 0x2000>;
interrupts = <GIC_PPI 9
......
arch/arm/boot/dts/exynos5.dtsi
View file @ 387720c9
......@@ -90,11 +90,11 @@ combiner: interrupt-controller@10440000 {
};
gic: interrupt-controller@10481000 {
compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
compatible = "arm,gic-400", "arm,cortex-a15-gic", "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10481000 0x1000>,
<0x10482000 0x1000>,
<0x10482000 0x2000>,
<0x10484000 0x2000>,
<0x10486000 0x2000>;
interrupts = <GIC_PPI 9
......
arch/arm/boot/dts/exynos5260.dtsi
View file @ 387720c9
......@@ -167,7 +167,7 @@ gic: interrupt-controller@10481000 {
#size-cells = <0>;
interrupt-controller;
reg = <0x10481000 0x1000>,
<0x10482000 0x1000>,
<0x10482000 0x2000>,
<0x10484000 0x2000>,
<0x10486000 0x2000>;
interrupts = <GIC_PPI 9
......
arch/arm/boot/dts/exynos5440.dtsi
View file @ 387720c9
......@@ -40,7 +40,7 @@ gic: interrupt-controller@2E0000 {
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x2E1000 0x1000>,
<0x2E2000 0x1000>,
<0x2E2000 0x2000>,
<0x2E4000 0x2000>,
<0x2E6000 0x2000>;
interrupts = <GIC_PPI 9
......
arch/arm/boot/dts/imx6ul.dtsi
View file @ 387720c9
......@@ -91,11 +91,11 @@ cpu0: cpu@0 {
};
intc: interrupt-controller@00a01000 {
compatible = "arm,cortex-a7-gic";
compatible = "arm,gic-400", "arm,cortex-a7-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x00a01000 0x1000>,
<0x00a02000 0x1000>,
<0x00a02000 0x2000>,
<0x00a04000 0x2000>,
<0x00a06000 0x2000>;
};
......
arch/arm/boot/dts/keystone-k2g.dtsi
View file @ 387720c9
......@@ -40,12 +40,12 @@ cpu@0 {
};
gic: interrupt-controller@02561000 {
compatible = "arm,cortex-a15-gic";
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x02561000 0x0 0x1000>,
<0x0 0x02562000 0x0 0x2000>,
<0x0 0x02564000 0x0 0x1000>,
<0x0 0x02564000 0x0 0x2000>,
<0x0 0x02566000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
......
arch/arm/boot/dts/keystone.dtsi
View file @ 387720c9
......@@ -30,12 +30,12 @@ memory {
};
gic: interrupt-controller {
compatible = "arm,cortex-a15-gic";
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x02561000 0x0 0x1000>,
<0x0 0x02562000 0x0 0x2000>,
<0x0 0x02564000 0x0 0x1000>,
<0x0 0x02564000 0x0 0x2000>,
<0x0 0x02566000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
......
arch/arm/boot/dts/ls1021a.dtsi
View file @ 387720c9
......@@ -110,11 +110,11 @@ soc {
ranges;
gic: interrupt-controller@1400000 {
compatible = "arm,cortex-a7-gic";
compatible = "arm,gic-400", "arm,cortex-a7-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x1401000 0x0 0x1000>,
<0x0 0x1402000 0x0 0x1000>,
<0x0 0x1402000 0x0 0x2000>,
<0x0 0x1404000 0x0 0x2000>,
<0x0 0x1406000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
......
arch/arm/boot/dts/mt2701.dtsi
View file @ 387720c9
......@@ -232,7 +232,7 @@ gic: interrupt-controller@10211000 {
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0 0x10211000 0 0x1000>,
<0 0x10212000 0 0x1000>,
<0 0x10212000 0 0x2000>,
<0 0x10214000 0 0x2000>,
<0 0x10216000 0 0x2000>;
};
......
arch/arm/boot/dts/mt6580.dtsi
View file @ 387720c9
......@@ -91,7 +91,7 @@ gic: interrupt-controller@10211000 {
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0x10211000 0x1000>,
<0x10212000 0x1000>,
<0x10212000 0x2000>,
<0x10214000 0x2000>,
<0x10216000 0x2000>;
};
......
arch/arm/boot/dts/mt6589.dtsi
View file @ 387720c9
......@@ -102,7 +102,7 @@ gic: interrupt-controller@10211000 {
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0x10211000 0x1000>,
<0x10212000 0x1000>,
<0x10212000 0x2000>,
<0x10214000 0x2000>,
<0x10216000 0x2000>;
};
......
arch/arm/boot/dts/mt7623.dtsi
View file @ 387720c9
......@@ -104,7 +104,7 @@ gic: interrupt-controller@10211000 {
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0 0x10211000 0 0x1000>,
<0 0x10212000 0 0x1000>,
<0 0x10212000 0 0x2000>,
<0 0x10214000 0 0x2000>,
<0 0x10216000 0 0x2000>;
};
......
arch/arm/boot/dts/mt8127.dtsi
View file @ 387720c9
......@@ -129,7 +129,7 @@ gic: interrupt-controller@10211000 {
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0 0x10211000 0 0x1000>,
<0 0x10212000 0 0x1000>,
<0 0x10212000 0 0x2000>,
<0 0x10214000 0 0x2000>,
<0 0x10216000 0 0x2000>;
};
......
arch/arm/boot/dts/mt8135.dtsi
View file @ 387720c9
......@@ -221,7 +221,7 @@ gic: interrupt-controller@10211000 {
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0 0x10211000 0 0x1000>,
<0 0x10212000 0 0x1000>,
<0 0x10212000 0 0x2000>,
<0 0x10214000 0 0x2000>,
<0 0x10216000 0 0x2000>;
};
......
arch/arm/boot/dts/omap5.dtsi
View file @ 387720c9
......@@ -92,7 +92,7 @@ gic: interrupt-controller@48211000 {
interrupt-controller;
#interrupt-cells = <3>;
reg = <0 0x48211000 0 0x1000>,
<0 0x48212000 0 0x1000>,
<0 0x48212000 0 0x2000>,
<0 0x48214000 0 0x2000>,
<0 0x48216000 0 0x2000>;
interrupt-parent = <&gic>;
......
arch/arm/boot/dts/r8a73a4.dtsi
View file @ 387720c9
......@@ -465,7 +465,7 @@ gic: interrupt-controller@f1001000 {
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
......
arch/arm/boot/dts/r8a7743.dtsi
View file @ 387720c9
......@@ -55,7 +55,7 @@ gic: interrupt-controller@f1001000 {
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
......
arch/arm/boot/dts/r8a7745.dtsi
View file @ 387720c9
......@@ -55,7 +55,7 @@ gic: interrupt-controller@f1001000 {
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
......
arch/arm/boot/dts/r8a7790.dtsi
View file @ 387720c9
......@@ -183,7 +183,7 @@ gic: interrupt-controller@f1001000 {
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
......
arch/arm/boot/dts/r8a7791.dtsi
View file @ 387720c9
......@@ -114,7 +114,7 @@ gic: interrupt-controller@f1001000 {
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
......
arch/arm/boot/dts/r8a7792.dtsi
View file @ 387720c9
......@@ -88,7 +88,7 @@ gic: interrupt-controller@f1001000 {
#interrupt-cells = <3>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
......
arch/arm/boot/dts/r8a7793.dtsi
View file @ 387720c9
......@@ -105,7 +105,7 @@ gic: interrupt-controller@f1001000 {
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
......
arch/arm/boot/dts/r8a7794.dtsi
View file @ 387720c9
......@@ -71,7 +71,7 @@ gic: interrupt-controller@f1001000 {
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
......
arch/arm/boot/dts/rk1108.dtsi
View file @ 387720c9
......@@ -215,7 +215,7 @@ gic: interrupt-controller@32010000 {
#address-cells = <0>;
reg = <0x32011000 0x1000>,
<0x32012000 0x1000>,
<0x32012000 0x2000>,
<0x32014000 0x2000>,
<0x32016000 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
......
arch/arm/boot/dts/rk3036.dtsi
View file @ 387720c9
......@@ -189,7 +189,7 @@ gic: interrupt-controller@10139000 {
#address-cells = <0>;
reg = <0x10139000 0x1000>,
<0x1013a000 0x1000>,
<0x1013a000 0x2000>,
<0x1013c000 0x2000>,
<0x1013e000 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
......
arch/arm/boot/dts/rk322x.dtsi
View file @ 387720c9
......@@ -443,7 +443,7 @@ gic: interrupt-controller@32010000 {
#address-cells = <0>;
reg = <0x32011000 0x1000>,
<0x32012000 0x1000>,
<0x32012000 0x2000>,
<0x32014000 0x2000>,
<0x32016000 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
......
arch/arm/boot/dts/rk3288.dtsi
View file @ 387720c9
......@@ -1194,7 +1194,7 @@ gic: interrupt-controller@ffc01000 {
#address-cells = <0>;
reg = <0xffc01000 0x1000>,
<0xffc02000 0x1000>,
<0xffc02000 0x2000>,
<0xffc04000 0x2000>,
<0xffc06000 0x2000>;
interrupts = <GIC_PPI 9 0xf04>;
......
arch/arm/boot/dts/sun6i-a31.dtsi
View file @ 387720c9
......@@ -843,7 +843,7 @@ spi3: spi@01c6b000 {
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
<0x01c82000 0x1000>,
<0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
......
arch/arm/boot/dts/sun7i-a20.dtsi
View file @ 387720c9
......@@ -1613,9 +1613,9 @@ hstimer@01c60000 {
};
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
<0x01c82000 0x1000>,
<0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
......
arch/arm/boot/dts/sun8i-a23-a33.dtsi
View file @ 387720c9
......@@ -470,7 +470,7 @@ i2c2: i2c@01c2b400 {
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
<0x01c82000 0x1000>,
<0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
......
arch/arm/boot/dts/sun8i-a83t.dtsi
View file @ 387720c9
......@@ -212,7 +212,7 @@ uart0: serial@01c28000 {
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
<0x01c82000 0x1000>,
<0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
......
arch/arm/boot/dts/sun8i-h3.dtsi
View file @ 387720c9
......@@ -556,7 +556,7 @@ i2c2: i2c@01c2b400 {
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
<0x01c82000 0x1000>,
<0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
......
arch/arm/boot/dts/sun9i-a80.dtsi
View file @ 387720c9
......@@ -613,7 +613,7 @@ mmc_config_clk: clk@01c13000 {
gic: interrupt-controller@01c41000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c41000 0x1000>,
<0x01c42000 0x1000>,
<0x01c42000 0x2000>,
<0x01c44000 0x2000>,
<0x01c46000 0x2000>;
interrupt-controller;
......
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