Commit 38d4e463 authored by Jingwen Chen's avatar Jingwen Chen Committed by Alex Deucher

drm/amd/amdgpu: fix bad job hw_fence use after free in advance tdr

[Why]
In advance tdr mode, the real bad job will be resubmitted twice, while
in drm_sched_resubmit_jobs_ext, there's a dma_fence_put, so the bad job
is put one more time than other jobs.

[How]
Adding dma_fence_get before resbumit job in
amdgpu_device_recheck_guilty_jobs and put the fence for normal jobs
Signed-off-by: default avatarJingwen Chen <Jingwen.Chen2@amd.com>
Reviewed-by: default avatarAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d9bd0541
...@@ -4850,6 +4850,9 @@ static void amdgpu_device_recheck_guilty_jobs( ...@@ -4850,6 +4850,9 @@ static void amdgpu_device_recheck_guilty_jobs(
/* clear job's guilty and depend the folowing step to decide the real one */ /* clear job's guilty and depend the folowing step to decide the real one */
drm_sched_reset_karma(s_job); drm_sched_reset_karma(s_job);
/* for the real bad job, it will be resubmitted twice, adding a dma_fence_get
* to make sure fence is balanced */
dma_fence_get(s_job->s_fence->parent);
drm_sched_resubmit_jobs_ext(&ring->sched, 1); drm_sched_resubmit_jobs_ext(&ring->sched, 1);
ret = dma_fence_wait_timeout(s_job->s_fence->parent, false, ring->sched.timeout); ret = dma_fence_wait_timeout(s_job->s_fence->parent, false, ring->sched.timeout);
...@@ -4885,6 +4888,7 @@ static void amdgpu_device_recheck_guilty_jobs( ...@@ -4885,6 +4888,7 @@ static void amdgpu_device_recheck_guilty_jobs(
/* got the hw fence, signal finished fence */ /* got the hw fence, signal finished fence */
atomic_dec(ring->sched.score); atomic_dec(ring->sched.score);
dma_fence_put(s_job->s_fence->parent);
dma_fence_get(&s_job->s_fence->finished); dma_fence_get(&s_job->s_fence->finished);
dma_fence_signal(&s_job->s_fence->finished); dma_fence_signal(&s_job->s_fence->finished);
dma_fence_put(&s_job->s_fence->finished); dma_fence_put(&s_job->s_fence->finished);
......
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