Commit 38e3a6e8 authored by Kevin Cernekee's avatar Kevin Cernekee Committed by Jason Cooper

irqchip: bcm7120-l2: Make sure all register accesses use base+offset

A couple of accesses to IRQEN (base+0x00) just used "base" directly, so
they would break if IRQEN ever became nonzero.  Make sure that all
reads/writes specify the register offset constant.
Signed-off-by: default avatarKevin Cernekee <cernekee@gmail.com>
Acked-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/1415342669-30640-9-git-send-email-cernekee@gmail.comSigned-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 60b2a29e
......@@ -66,10 +66,10 @@ static void bcm7120_l2_intc_suspend(struct irq_data *d)
irq_gc_lock(gc);
/* Save the current mask and the interrupt forward mask */
b->saved_mask = __raw_readl(b->base) | b->irq_fwd_mask;
b->saved_mask = __raw_readl(b->base + IRQEN) | b->irq_fwd_mask;
if (b->can_wake) {
reg = b->saved_mask | gc->wake_active;
__raw_writel(reg, b->base);
__raw_writel(reg, b->base + IRQEN);
}
irq_gc_unlock(gc);
}
......@@ -81,7 +81,7 @@ static void bcm7120_l2_intc_resume(struct irq_data *d)
/* Restore the saved mask */
irq_gc_lock(gc);
__raw_writel(b->saved_mask, b->base);
__raw_writel(b->saved_mask, b->base + IRQEN);
irq_gc_unlock(gc);
}
......
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