Commit 38fbc32e authored by Martin Kaiser's avatar Martin Kaiser Committed by Greg Kroah-Hartman

staging: r8188eu: read pwr seq length, remove PWR_CMD_END

The definitions of the power sequences are in the same file as the function
which processes them. We can simply read the number of entries in a power
sequence. There's no need for a PWR_CMD_END command to indicate the end
of a sequence.

Tested-by: Philipp Hortmann <philipp.g.hortmann@gmail.com> # Edimax N150
Signed-off-by: default avatarMartin Kaiser <martin@kaiser.cx>
Link: https://lore.kernel.org/r/20220704145221.159949-4-martin@kaiser.cxSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 8be317cf
...@@ -24,11 +24,6 @@ ...@@ -24,11 +24,6 @@
/* msk: N/A */ /* msk: N/A */
/* value: N/A */ /* value: N/A */
#define PWR_CMD_END 0x04
/* offset: N/A */
/* msk: N/A */
/* value: N/A */
struct wl_pwr_cfg { struct wl_pwr_cfg {
u16 offset; u16 offset;
u8 cmd:4; u8 cmd:4;
...@@ -50,7 +45,6 @@ static struct wl_pwr_cfg rtl8188E_power_on_flow[] = { ...@@ -50,7 +45,6 @@ static struct wl_pwr_cfg rtl8188E_power_on_flow[] = {
{ 0x0005, PWR_CMD_WRITE, BIT(0), BIT(0) }, { 0x0005, PWR_CMD_WRITE, BIT(0), BIT(0) },
{ 0x0005, PWR_CMD_POLLING, BIT(0), 0 }, { 0x0005, PWR_CMD_POLLING, BIT(0), 0 },
{ 0x0023, PWR_CMD_WRITE, BIT(4), 0 }, { 0x0023, PWR_CMD_WRITE, BIT(4), 0 },
{ 0xFFFF, PWR_CMD_END, 0, 0 },
}; };
static struct wl_pwr_cfg rtl8188E_card_disable_flow[] = { static struct wl_pwr_cfg rtl8188E_card_disable_flow[] = {
...@@ -63,7 +57,6 @@ static struct wl_pwr_cfg rtl8188E_card_disable_flow[] = { ...@@ -63,7 +57,6 @@ static struct wl_pwr_cfg rtl8188E_card_disable_flow[] = {
{ 0x0007, PWR_CMD_WRITE, 0xFF, 0 }, /* enable bandgap mbias in suspend */ { 0x0007, PWR_CMD_WRITE, 0xFF, 0 }, /* enable bandgap mbias in suspend */
{ 0x0041, PWR_CMD_WRITE, BIT(4), 0 }, /* Clear SIC_EN register */ { 0x0041, PWR_CMD_WRITE, BIT(4), 0 }, /* Clear SIC_EN register */
{ 0xfe10, PWR_CMD_WRITE, BIT(4), BIT(4) }, /* Set USB suspend enable local register */ { 0xfe10, PWR_CMD_WRITE, BIT(4), BIT(4) }, /* Set USB suspend enable local register */
{ 0xFFFF, PWR_CMD_END, 0, 0 },
}; };
/* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */ /* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */
...@@ -78,7 +71,6 @@ static struct wl_pwr_cfg rtl8188E_enter_lps_flow[] = { ...@@ -78,7 +71,6 @@ static struct wl_pwr_cfg rtl8188E_enter_lps_flow[] = {
{ 0x0100, PWR_CMD_WRITE, 0xFF, 0x3F }, /* Reset MAC TRX */ { 0x0100, PWR_CMD_WRITE, 0xFF, 0x3F }, /* Reset MAC TRX */
{ 0x0101, PWR_CMD_WRITE, BIT(1), 0 }, /* check if removed later */ { 0x0101, PWR_CMD_WRITE, BIT(1), 0 }, /* check if removed later */
{ 0x0553, PWR_CMD_WRITE, BIT(5), BIT(5) }, /* Respond TxOK to scheduler */ { 0x0553, PWR_CMD_WRITE, BIT(5), BIT(5) }, /* Respond TxOK to scheduler */
{ 0xFFFF, PWR_CMD_END, 0, 0 },
}; };
u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq) u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq)
...@@ -86,7 +78,7 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq) ...@@ -86,7 +78,7 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq)
struct wl_pwr_cfg pwrcfgcmd = {0}; struct wl_pwr_cfg pwrcfgcmd = {0};
struct wl_pwr_cfg *pwrseqcmd; struct wl_pwr_cfg *pwrseqcmd;
u8 poll_bit = false; u8 poll_bit = false;
u32 aryidx = 0; u8 idx, num_steps;
u8 value = 0; u8 value = 0;
u32 offset = 0; u32 offset = 0;
u32 poll_count = 0; /* polling autoload done. */ u32 poll_count = 0; /* polling autoload done. */
...@@ -96,19 +88,22 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq) ...@@ -96,19 +88,22 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq)
switch (seq) { switch (seq) {
case PWR_ON_FLOW: case PWR_ON_FLOW:
pwrseqcmd = rtl8188E_power_on_flow; pwrseqcmd = rtl8188E_power_on_flow;
num_steps = ARRAY_SIZE(rtl8188E_power_on_flow);
break; break;
case DISABLE_FLOW: case DISABLE_FLOW:
pwrseqcmd = rtl8188E_card_disable_flow; pwrseqcmd = rtl8188E_card_disable_flow;
num_steps = ARRAY_SIZE(rtl8188E_card_disable_flow);
break; break;
case LPS_ENTER_FLOW: case LPS_ENTER_FLOW:
pwrseqcmd = rtl8188E_enter_lps_flow; pwrseqcmd = rtl8188E_enter_lps_flow;
num_steps = ARRAY_SIZE(rtl8188E_enter_lps_flow);
break; break;
default: default:
return false; return false;
} }
do { for (idx = 0; idx < num_steps; idx++) {
pwrcfgcmd = pwrseqcmd[aryidx]; pwrcfgcmd = pwrseqcmd[idx];
switch (GET_PWR_CFG_CMD(pwrcfgcmd)) { switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
case PWR_CMD_WRITE: case PWR_CMD_WRITE:
...@@ -146,15 +141,9 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq) ...@@ -146,15 +141,9 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq)
case PWR_CMD_DELAY: case PWR_CMD_DELAY:
udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)); udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd));
break; break;
case PWR_CMD_END:
/* When this command is parsed, end the process */
return true;
break;
default: default:
break; break;
} }
}
aryidx++;/* Add Array Index */
} while (1);
return true; return true;
} }
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