Commit 392bceed authored by Philipp Zabel's avatar Philipp Zabel Committed by Greg Kroah-Hartman

serial: imx: Fix DMA handling for IDLE condition aborts

The driver configures the IDLE condition to interrupt the SDMA engine.
Since the SDMA UART ROM script doesn't clear the IDLE bit itself, this
caused repeated 1-byte DMA transfers, regardless of available data in the
RX FIFO. Also, when returning due to the IDLE condition, the UART ROM
script already increased its counter, causing residue to be off by one.

This patch clears the IDLE condition to avoid repeated 1-byte DMA transfers
and decreases count by when the DMA transfer was aborted due to the IDLE
condition, fixing serial transfers using DMA on i.MX6Q.
Reported-by: default avatarPeter Seiderer <ps.report@gmx.net>
Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Tested-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 43dd1f9a
...@@ -911,6 +911,14 @@ static void dma_rx_callback(void *data) ...@@ -911,6 +911,14 @@ static void dma_rx_callback(void *data)
status = dmaengine_tx_status(chan, (dma_cookie_t)0, &state); status = dmaengine_tx_status(chan, (dma_cookie_t)0, &state);
count = RX_BUF_SIZE - state.residue; count = RX_BUF_SIZE - state.residue;
if (readl(sport->port.membase + USR2) & USR2_IDLE) {
/* In condition [3] the SDMA counted up too early */
count--;
writel(USR2_IDLE, sport->port.membase + USR2);
}
dev_dbg(sport->port.dev, "We get %d bytes.\n", count); dev_dbg(sport->port.dev, "We get %d bytes.\n", count);
if (count) { if (count) {
......
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