Commit 3a0851b4 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Abhinav Kumar

drm/msm/dpu: check for overflow in _dpu_crtc_setup_lm_bounds()

Make _dpu_crtc_setup_lm_bounds() check that CRTC width is not
overflowing LM requirements. Rename the function accordingly.

Fixes: 25fdd593 ("drm/msm: Add SDM845 DPU support")
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612237/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-3-617e1ecc4b7a@linaro.orgSigned-off-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
parent 3ae133b0
...@@ -711,12 +711,13 @@ void dpu_crtc_complete_commit(struct drm_crtc *crtc) ...@@ -711,12 +711,13 @@ void dpu_crtc_complete_commit(struct drm_crtc *crtc)
_dpu_crtc_complete_flip(crtc); _dpu_crtc_complete_flip(crtc);
} }
static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc, static int _dpu_crtc_check_and_setup_lm_bounds(struct drm_crtc *crtc,
struct drm_crtc_state *state) struct drm_crtc_state *state)
{ {
struct dpu_crtc_state *cstate = to_dpu_crtc_state(state); struct dpu_crtc_state *cstate = to_dpu_crtc_state(state);
struct drm_display_mode *adj_mode = &state->adjusted_mode; struct drm_display_mode *adj_mode = &state->adjusted_mode;
u32 crtc_split_width = adj_mode->hdisplay / cstate->num_mixers; u32 crtc_split_width = adj_mode->hdisplay / cstate->num_mixers;
struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc);
int i; int i;
for (i = 0; i < cstate->num_mixers; i++) { for (i = 0; i < cstate->num_mixers; i++) {
...@@ -727,7 +728,12 @@ static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc, ...@@ -727,7 +728,12 @@ static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc,
r->y2 = adj_mode->vdisplay; r->y2 = adj_mode->vdisplay;
trace_dpu_crtc_setup_lm_bounds(DRMID(crtc), i, r); trace_dpu_crtc_setup_lm_bounds(DRMID(crtc), i, r);
if (drm_rect_width(r) > dpu_kms->catalog->caps->max_mixer_width)
return -E2BIG;
} }
return 0;
} }
static void _dpu_crtc_get_pcc_coeff(struct drm_crtc_state *state, static void _dpu_crtc_get_pcc_coeff(struct drm_crtc_state *state,
...@@ -803,7 +809,7 @@ static void dpu_crtc_atomic_begin(struct drm_crtc *crtc, ...@@ -803,7 +809,7 @@ static void dpu_crtc_atomic_begin(struct drm_crtc *crtc,
DRM_DEBUG_ATOMIC("crtc%d\n", crtc->base.id); DRM_DEBUG_ATOMIC("crtc%d\n", crtc->base.id);
_dpu_crtc_setup_lm_bounds(crtc, crtc->state); _dpu_crtc_check_and_setup_lm_bounds(crtc, crtc->state);
/* encoder will trigger pending mask now */ /* encoder will trigger pending mask now */
drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask)
...@@ -1189,8 +1195,11 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc, ...@@ -1189,8 +1195,11 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc,
if (crtc_state->active_changed) if (crtc_state->active_changed)
crtc_state->mode_changed = true; crtc_state->mode_changed = true;
if (cstate->num_mixers) if (cstate->num_mixers) {
_dpu_crtc_setup_lm_bounds(crtc, crtc_state); rc = _dpu_crtc_check_and_setup_lm_bounds(crtc, crtc_state);
if (rc)
return rc;
}
/* FIXME: move this to dpu_plane_atomic_check? */ /* FIXME: move this to dpu_plane_atomic_check? */
drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) { drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) {
......
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