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Commit 3af49062 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'mfd-next-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd 

Pull MFD updates from Lee Jones:
 "New Drivers:
   - Add support for  Renesas RZ/G2L MTU3

  New Device Support:
   - Add support for Lenovo Yoga Book X90F to Intel CHT WC
   - Add support for MAX5970 and MAX5978 to Simple MFD (I2C)
   - Add support for Meteor Lake PCH-S LPSS PCI to Intel LPSS PCI
   - Add support for AXP15060 PMIC to X-Powers PMIC collection

  Remove Device Support:
   - Remove support for Samsung 5M8751 and S5M8763 PMIC devices

  New Functionality:
   - Convert deprecated QCOM IRQ Chip to config registers
   - Add support for 32-bit address spaces to Renesas SMUs

  Fix-ups:
   - Make use of APIs / MACROs designed to simplify and demystify
   - Add / improve Device Tree bindings
   - Memory saving struct layout optimisations
   - Remove old / deprecated functionality
   - Factor out unassigned register addresses from ranges
   - Trivial: Spelling fixes, renames and coding style fixes
   - Rid 'defined but not used' warnings
   - Remove ineffective casts and pointer stubs

  Bug Fixes:
   - Fix incorrectly non-inverted mask/unmask IRQs on QCOM platforms
   - Remove MODULE_*() helpers from non-tristate drivers
   - Do not attempt to use out-of-range memory addresses associated with io_base
   - Provide missing export helpers
   - Fix remap bulk read optimisation fallout
   - Fix memory leak issues in error paths"

* tag 'mfd-next-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (88 commits)
  dt-bindings: mfd: ti,j721e-system-controller: Add SoC chip ID
  leds: bd2606mvv: Driver for the Rohm 6 Channel i2c LED driver
  dt-bindings: mfd: qcom,spmi-pmic: Document flash LED controller
  dt-bindings: mfd: x-powers,axp152: Document the AXP15060 variant
  mfd: axp20x: Add support for AXP15060 PMIC
  dt-bindings: mfd: x-powers,axp152: Document the AXP313a variant
  counter: rz-mtu3-cnt: Unlock on error in rz_mtu3_count_ceiling_write()
  dt-bindings: mfd: dlg,da9063: Document voltage monitoring
  dt-bindings: mfd: stm32: Remove unnecessary blank lines
  dt-bindings: mfd: qcom,spmi-pmic: Use generic ADC node name in examples
  dt-bindings: mfd: syscon: Add nuvoton,ma35d1-sys compatible
  MAINTAINERS: Add entries for Renesas RZ/G2L MTU3a counter driver
  counter: Add Renesas RZ/G2L MTU3a counter driver
  Documentation: ABI: sysfs-bus-counter: add cascade_counts_enable and external_input_phase_clock_select
  mfd: Add Renesas RZ/G2L MTU3a core driver
  dt-bindings: timer: Document RZ/G2L MTU3a bindings
  mfd: rsmu_i2c: Convert to i2c's .probe_new() again
  mfd: intel-lpss: Add Intel Meteor Lake PCH-S LPSS PCI IDs
  mfd: dln2: Fix memory leak in dln2_probe()
  mfd: axp20x: Fix axp288 writable-ranges
  ...
parents c5eb8bf7 9e9ff392
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Documentation/ABI/testing/sysfs-bus-counter
View file @ 3af49062
What: /sys/bus/counter/devices/counterX/cascade_counts_enable
KernelVersion: 6.4
Contact: linux-iio@vger.kernel.org
Description:
Indicates the cascading of Counts on Counter X.
Valid attribute values are boolean.
What: /sys/bus/counter/devices/counterX/external_input_phase_clock_select
KernelVersion: 6.4
Contact: linux-iio@vger.kernel.org
Description:
Selects the external clock pin for phase counting mode of
Counter X.
MTCLKA-MTCLKB:
MTCLKA and MTCLKB pins are selected for the external
phase clock.
MTCLKC-MTCLKD:
MTCLKC and MTCLKD pins are selected for the external
phase clock.
What: /sys/bus/counter/devices/counterX/external_input_phase_clock_select_available
KernelVersion: 6.4
Contact: linux-iio@vger.kernel.org
Description:
Discrete set of available values for the respective device
configuration are listed in this file.
What: /sys/bus/counter/devices/counterX/countY/count
KernelVersion: 5.2
Contact: linux-iio@vger.kernel.org
......@@ -215,6 +245,8 @@ Contact: linux-iio@vger.kernel.org
Description:
This attribute indicates the number of overflows of count Y.
What: /sys/bus/counter/devices/counterX/cascade_counts_enable_component_id
What: /sys/bus/counter/devices/counterX/external_input_phase_clock_select_component_id
What: /sys/bus/counter/devices/counterX/countY/capture_component_id
What: /sys/bus/counter/devices/counterX/countY/ceiling_component_id
What: /sys/bus/counter/devices/counterX/countY/floor_component_id
......
Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml
View file @ 3af49062
......@@ -36,7 +36,7 @@ properties:
clock-controller:
# Child node
type: object
$ref: "../clock/canaan,k210-clk.yaml"
$ref: ../clock/canaan,k210-clk.yaml
description:
Clock controller for the SoC clocks. This child node definition
should follow the bindings specified in
......@@ -45,7 +45,7 @@ properties:
reset-controller:
# Child node
type: object
$ref: "../reset/canaan,k210-rst.yaml"
$ref: ../reset/canaan,k210-rst.yaml
description:
Reset controller for the SoC. This child node definition
should follow the bindings specified in
......@@ -54,7 +54,7 @@ properties:
syscon-reboot:
# Child node
type: object
$ref: "../power/reset/syscon-reboot.yaml"
$ref: ../power/reset/syscon-reboot.yaml
description:
Reboot method for the SoC. This child node definition
should follow the bindings specified in
......
Documentation/devicetree/bindings/mfd/google,cros-ec.yaml
View file @ 3af49062
......@@ -65,7 +65,7 @@ properties:
ARM Cortex M4 Co-processor. Contains the name of the rpmsg
device. Used to match the subnode to the rpmsg device announced by
the SCP.
$ref: "/schemas/types.yaml#/definitions/string"
$ref: /schemas/types.yaml#/definitions/string
spi-max-frequency: true
......@@ -94,23 +94,23 @@ properties:
const: 0
typec:
$ref: "/schemas/chrome/google,cros-ec-typec.yaml#"
$ref: /schemas/chrome/google,cros-ec-typec.yaml#
ec-pwm:
$ref: "/schemas/pwm/google,cros-ec-pwm.yaml#"
$ref: /schemas/pwm/google,cros-ec-pwm.yaml#
deprecated: true
pwm:
$ref: "/schemas/pwm/google,cros-ec-pwm.yaml#"
$ref: /schemas/pwm/google,cros-ec-pwm.yaml#
kbd-led-backlight:
$ref: "/schemas/chrome/google,cros-kbd-led-backlight.yaml#"
$ref: /schemas/chrome/google,cros-kbd-led-backlight.yaml#
keyboard-controller:
$ref: "/schemas/input/google,cros-ec-keyb.yaml#"
$ref: /schemas/input/google,cros-ec-keyb.yaml#
proximity:
$ref: "/schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml#"
$ref: /schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml#
codecs:
type: object
......@@ -126,7 +126,7 @@ properties:
patternProperties:
"^ec-codec@[a-f0-9]+$":
type: object
$ref: "/schemas/sound/google,cros-ec-codec.yaml#"
$ref: /schemas/sound/google,cros-ec-codec.yaml#
required:
- "#address-cells"
......@@ -151,15 +151,15 @@ properties:
patternProperties:
"^i2c-tunnel[0-9]*$":
type: object
$ref: "/schemas/i2c/google,cros-ec-i2c-tunnel.yaml#"
$ref: /schemas/i2c/google,cros-ec-i2c-tunnel.yaml#
"^regulator@[0-9]+$":
type: object
$ref: "/schemas/regulator/google,cros-ec-regulator.yaml#"
$ref: /schemas/regulator/google,cros-ec-regulator.yaml#
"^extcon[0-9]*$":
type: object
$ref: "/schemas/extcon/extcon-usbc-cros-ec.yaml#"
$ref: /schemas/extcon/extcon-usbc-cros-ec.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml
View file @ 3af49062
......@@ -53,7 +53,7 @@ properties:
'^ldo[0-9]+$':
type: object
$ref: "/schemas/regulator/regulator.yaml#"
$ref: /schemas/regulator/regulator.yaml#
unevaluatedProperties: false
......
Documentation/devicetree/bindings/mfd/maxim,max5970.yaml 0 → 100644
View file @ 3af49062
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/maxim,max5970.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Regulator for MAX5970 Smart Switch from Maxim Integrated
maintainers:
- Patrick Rudolph <patrick.rudolph@9elements.com>
description: |
The smart switch provides no output regulation, but independent fault protection
and voltage and current sensing.
Programming is done through I2C bus.
Datasheets:
https://datasheets.maximintegrated.com/en/ds/MAX5970.pdf
https://datasheets.maximintegrated.com/en/ds/MAX5978.pdf
properties:
compatible:
enum:
- maxim,max5970
- maxim,max5978
reg:
maxItems: 1
interrupts:
maxItems: 1
leds:
type: object
description:
Properties for four LEDS.
properties:
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^led@[0-3]$":
$ref: /schemas/leds/common.yaml#
type: object
additionalProperties: false
vss1-supply:
description: Supply of the first channel.
vss2-supply:
description: Supply of the second channel.
regulators:
type: object
description:
Properties for both hot swap control/switch.
patternProperties:
"^sw[0-1]$":
$ref: /schemas/regulator/regulator.yaml#
type: object
properties:
shunt-resistor-micro-ohms:
description: |
The value of current sense resistor in microohms.
required:
- shunt-resistor-micro-ohms
unevaluatedProperties: false
additionalProperties: false
required:
- compatible
- reg
- regulators
- vss1-supply
allOf:
- if:
properties:
compatible:
enum:
- maxim,max5970
then:
required:
- vss2-supply
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
regulator@3a {
compatible = "maxim,max5978";
reg = <0x3a>;
vss1-supply = <&p3v3>;
regulators {
sw0_ref_0: sw0 {
shunt-resistor-micro-ohms = <12000>;
};
};
leds {
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
label = "led0";
default-state = "on";
};
led@1 {
reg = <1>;
label = "led1";
default-state = "on";
};
};
};
};
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
regulator@3a {
compatible = "maxim,max5970";
reg = <0x3a>;
vss1-supply = <&p3v3>;
vss2-supply = <&p5v>;
regulators {
sw0_ref_1: sw0 {
shunt-resistor-micro-ohms = <12000>;
};
sw1_ref_1: sw1 {
shunt-resistor-micro-ohms = <10000>;
};
};
};
};
...
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
View file @ 3af49062
......@@ -33,6 +33,7 @@ properties:
compatible:
items:
- enum:
- qcom,pm2250
- qcom,pm6125
- qcom,pm6150
- qcom,pm6150l
......@@ -78,6 +79,7 @@ properties:
- qcom,pmk8350
- qcom,pmk8550
- qcom,pmm8155au
- qcom,pmm8654au
- qcom,pmp8074
- qcom,pmr735a
- qcom,pmr735b
......@@ -115,6 +117,7 @@ patternProperties:
type: object
oneOf:
- $ref: /schemas/iio/adc/qcom,spmi-iadc.yaml#
- $ref: /schemas/iio/adc/qcom,spmi-rradc.yaml#
- $ref: /schemas/iio/adc/qcom,spmi-vadc.yaml#
"^adc-tm@[0-9a-f]+$":
......@@ -135,6 +138,14 @@ patternProperties:
type: object
$ref: /schemas/pinctrl/qcom,pmic-gpio.yaml#
"^led-controller@[0-9a-f]+$":
type: object
$ref: /schemas/leds/qcom,spmi-flash-led.yaml#
"^nvram@[0-9a-f]+$":
type: object
$ref: /schemas/nvmem/qcom,spmi-sdam.yaml#
"pon@[0-9a-f]+$":
type: object
$ref: /schemas/power/reset/qcom,pon.yaml#
......@@ -276,12 +287,12 @@ examples:
#size-cells = <0>;
#io-channel-cells = <1>;
adc-chan@6 {
channel@6 {
reg = <ADC5_DIE_TEMP>;
label = "die_temp";
};
adc-chan@4f {
channel@4f {
reg = <ADC5_AMUX_THM3_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
......
Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
View file @ 3af49062
......@@ -25,12 +25,16 @@ properties:
- qcom,sc8280xp-tcsr
- qcom,sdm630-tcsr
- qcom,sdm845-tcsr
- qcom,sdx55-tcsr
- qcom,sdx65-tcsr
- qcom,sm8150-tcsr
- qcom,sm8450-tcsr
- qcom,tcsr-apq8064
- qcom,tcsr-apq8084
- qcom,tcsr-ipq5332
- qcom,tcsr-ipq6018
- qcom,tcsr-ipq8064
- qcom,tcsr-ipq9574
- qcom,tcsr-mdm9615
- qcom,tcsr-msm8226
- qcom,tcsr-msm8660
......
Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml
View file @ 3af49062
......@@ -49,7 +49,7 @@ patternProperties:
"rtc@[0-9a-f]+$":
type: object
$ref: "../rtc/qcom-pm8xxx-rtc.yaml"
$ref: ../rtc/qcom-pm8xxx-rtc.yaml
required:
- compatible
......
Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml
View file @ 3af49062
......@@ -46,7 +46,7 @@ properties:
rohm,clkout-open-drain:
description: clk32kout mode. Set to 1 for "open-drain" or 0 for "cmos".
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 1
......
Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml
View file @ 3af49062
......@@ -46,7 +46,7 @@ properties:
rohm,clkout-open-drain:
description: clk32kout mode. Set to 1 for "open-drain" or 0 for "cmos".
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 1
......
Documentation/devicetree/bindings/mfd/syscon.yaml
View file @ 3af49062
......@@ -56,6 +56,7 @@ properties:
- microchip,lan966x-cpu-syscon
- microchip,sparx5-cpu-syscon
- mstar,msc313-pmsleep
- nuvoton,ma35d1-sys
- nuvoton,wpcm450-shm
- rockchip,px30-qos
- rockchip,rk3036-qos
......@@ -67,6 +68,7 @@ properties:
- rockchip,rk3568-qos
- rockchip,rk3588-qos
- rockchip,rv1126-qos
- starfive,jh7100-sysmain
- const: syscon
......
Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
View file @ 3af49062
......@@ -62,6 +62,12 @@ patternProperties:
description:
The phy node corresponding to the ethernet MAC.
"^chipid@[0-9a-f]+$":
type: object
$ref: /schemas/hwinfo/ti,k3-socinfo.yaml#
description:
The node corresponding to SoC chip identification.
required:
- compatible
- reg
......@@ -99,5 +105,10 @@ examples:
reg = <0x4140 0x18>;
#clock-cells = <1>;
};
chipid@14 {
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
};
};
...
Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml 0 → 100644
View file @ 3af49062
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/ti,nspire-misc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI Nspire MISC hardware block
maintainers:
- Andrew Davis <afd@ti.com>
description:
System controller node represents a register region containing a set
of miscellaneous registers. The registers are not cohesive enough to
represent as any specific type of device. Currently there is a reset
controller.
properties:
compatible:
items:
- enum:
- ti,nspire-misc
- const: syscon
- const: simple-mfd
reg:
maxItems: 1
reboot:
$ref: /schemas/power/reset/syscon-reboot.yaml#
required:
- compatible
- reg
- reboot
additionalProperties: false
examples:
- |
misc: misc@900a0000 {
compatible = "ti,nspire-misc", "syscon", "simple-mfd";
reg = <0x900a0000 0x1000>;
reboot {
compatible = "syscon-reboot";
offset = <0x08>;
value = <0x02>;
};
};
Documentation/devicetree/bindings/mfd/wlf,arizona.yaml
View file @ 3af49062
......@@ -156,7 +156,7 @@ properties:
entry has a value that is out of range for a 16 bit register then the
chip default will be used. If present exactly five values must be
specified.
$ref: "/schemas/types.yaml#/definitions/uint32-array"
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 1
maxItems: 5
......
Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml
View file @ 3af49062
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: "http://devicetree.org/schemas/mfd/x-powers,ac100.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/mfd/x-powers,ac100.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: X-Powers AC100
......
Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml
View file @ 3af49062
......@@ -47,9 +47,8 @@ allOf:
- x-powers,axp209
then:
not:
required:
- x-powers,drive-vbus-en
properties:
x-powers,drive-vbus-en: false
- if:
not:
......@@ -59,14 +58,9 @@ allOf:
const: x-powers,axp806
then:
allOf:
- not:
required:
- x-powers,self-working-mode
- not:
required:
- x-powers,master-mode
properties:
x-powers,self-working-mode: false
x-powers,master-mode: false
- if:
not:
......@@ -79,6 +73,18 @@ allOf:
required:
- interrupts
- if:
properties:
compatible:
contains:
enum:
- x-powers,axp313a
- x-powers,axp15060
then:
properties:
x-powers,dcdc-freq: false
properties:
compatible:
oneOf:
......@@ -88,10 +94,12 @@ properties:
- x-powers,axp209
- x-powers,axp221
- x-powers,axp223
- x-powers,axp313a
- x-powers,axp803
- x-powers,axp806
- x-powers,axp809
- x-powers,axp813
- x-powers,axp15060
- items:
- const: x-powers,axp228
- const: x-powers,axp221
......@@ -260,7 +268,7 @@ properties:
Defines the work frequency of DC-DC in kHz.
patternProperties:
"^(([a-f])?ldo[0-9]|dcdc[0-7a-e]|ldo(_|-)io(0|1)|(dc1)?sw|rtc(_|-)ldo|drivevbus|dc5ldo)$":
"^(([a-f])?ldo[0-9]|dcdc[0-7a-e]|ldo(_|-)io(0|1)|(dc1)?sw|rtc(_|-)ldo|cpusldo|drivevbus|dc5ldo)$":
$ref: /schemas/regulator/regulator.yaml#
type: object
unevaluatedProperties: false
......
Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml
View file @ 3af49062
......@@ -2,8 +2,8 @@
# Copyright 2019 Bootlin
%YAML 1.2
---
$id: "http://devicetree.org/schemas/mfd/xylon,logicvc.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/mfd/xylon,logicvc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xylon LogiCVC multi-function device
......
Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml 0 → 100644
View file @ 3af49062
This diff is collapsed.
MAINTAINERS
View file @ 3af49062
......@@ -17972,6 +17972,14 @@ S: Supported
F: Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
F: drivers/iio/adc/rzg2l_adc.c
RENESAS RZ/G2L MTU3a COUNTER DRIVER
M: Biju Das <biju.das.jz@bp.renesas.com>
L: linux-iio@vger.kernel.org
L: linux-renesas-soc@vger.kernel.org
S: Supported
F: Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
F: drivers/counter/rz-mtu3-cnt.c
RENESAS RZ/N1 A5PSW SWITCH DRIVER
M: Clément Léger <clement.leger@bootlin.com>
L: linux-renesas-soc@vger.kernel.org
......
drivers/counter/Kconfig
View file @ 3af49062
......@@ -73,6 +73,17 @@ config MICROCHIP_TCB_CAPTURE
To compile this driver as a module, choose M here: the
module will be called microchip-tcb-capture.
config RZ_MTU3_CNT
tristate "Renesas RZ/G2L MTU3a counter driver"
depends on RZ_MTU3 || COMPILE_TEST
help
Enable support for MTU3a counter driver found on Renesas RZ/G2L alike
SoCs. This IP supports both 16-bit and 32-bit phase counting mode
support.
To compile this driver as a module, choose M here: the
module will be called rz-mtu3-cnt.
config STM32_LPTIMER_CNT
tristate "STM32 LP Timer encoder counter driver"
depends on MFD_STM32_LPTIMER || COMPILE_TEST
......
drivers/counter/Makefile
View file @ 3af49062
......@@ -8,6 +8,7 @@ counter-y := counter-core.o counter-sysfs.o counter-chrdev.o
obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
obj-$(CONFIG_INTERRUPT_CNT) += interrupt-cnt.o
obj-$(CONFIG_RZ_MTU3_CNT) += rz-mtu3-cnt.o
obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
obj-$(CONFIG_TI_EQEP) += ti-eqep.o
......
drivers/counter/rz-mtu3-cnt.c 0 → 100644
View file @ 3af49062
This diff is collapsed.
drivers/gpio/Kconfig
View file @ 3af49062
......@@ -1292,6 +1292,18 @@ config GPIO_KEMPLD
This driver can also be built as a module. If so, the module will be
called gpio-kempld.
config GPIO_LJCA
tristate "INTEL La Jolla Cove Adapter GPIO support"
depends on MFD_LJCA
select GPIOLIB_IRQCHIP
default MFD_LJCA
help
Select this option to enable GPIO driver for the INTEL
La Jolla Cove Adapter (LJCA) board.
This driver can also be built as a module. If so, the module
will be called gpio-ljca.
config GPIO_LP3943
tristate "TI/National Semiconductor LP3943 GPIO expander"
depends on MFD_LP3943
......
drivers/gpio/Makefile
View file @ 3af49062
......@@ -79,6 +79,7 @@ obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o
obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o
obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o
obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o
obj-$(CONFIG_GPIO_LJCA) += gpio-ljca.o
obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o
obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o
obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o
......
drivers/gpio/gpio-ljca.c 0 → 100644
View file @ 3af49062
This diff is collapsed.
drivers/mfd/88pm860x-core.c
View file @ 3af49062
......@@ -1117,8 +1117,7 @@ static int pm860x_dt_init(struct device_node *np,
{
int ret;
if (of_get_property(np, "marvell,88pm860x-irq-read-clr", NULL))
pdata->irq_mode = 1;
pdata->irq_mode = of_property_read_bool(np, "marvell,88pm860x-irq-read-clr");
ret = of_property_read_u32(np, "marvell,88pm860x-slave-addr",
&pdata->companion_addr);
if (ret) {
......@@ -1276,4 +1275,3 @@ module_exit(pm860x_i2c_exit);
MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM860x");
MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
MODULE_LICENSE("GPL");
drivers/mfd/Kconfig
View file @ 3af49062
......@@ -266,6 +266,16 @@ config MFD_MADERA_SPI
Support for the Cirrus Logic Madera platform audio SoC
core functionality controlled via SPI.
config MFD_MAX597X
tristate "Maxim 597x power switch and monitor"
depends on (I2C && OF)
select MFD_SIMPLE_MFD_I2C
help
This driver controls a Maxim 5970/5978 switch via I2C bus.
The MAX5970/5978 is a smart switch with no output regulation, but
fault protection and voltage and current monitoring capabilities.
Also it supports upto 4 indication leds.
config MFD_CS47L15
bool "Cirrus Logic CS47L15"
select PINCTRL_CS47L15
......@@ -353,9 +363,6 @@ config MFD_DA9055
Additional drivers must be enabled in order to use the functionality
of the device.
This driver can be built as a module. If built as a module it will be
called "da9055"
config MFD_DA9062
tristate "Dialog Semiconductor DA9062/61 PMIC Support"
select MFD_CORE
......@@ -1308,6 +1315,16 @@ config MFD_SC27XX_PMIC
This driver provides common support for accessing the SC27xx PMICs,
and it also adds the irq_chip parts for handling the PMIC chip events.
config RZ_MTU3
bool "Renesas RZ/G2L MTU3a core driver"
depends on (ARCH_RZG2L && OF) || COMPILE_TEST
help
Select this option to enable Renesas RZ/G2L MTU3a core driver for
the Multi-Function Timer Pulse Unit 3 (MTU3a) hardware available
on SoCs from Renesas. The core driver shares the clk and channel
register access for the other child devices like Counter, PWM,
Clock Source, and Clock event.
config ABX500_CORE
bool "ST-Ericsson ABX500 Mixed Signal Circuit register functions"
depends on ARCH_U8500 || COMPILE_TEST
......
drivers/mfd/Makefile
View file @ 3af49062
......@@ -174,6 +174,7 @@ pcf50633-objs := pcf50633-core.o pcf50633-irq.o
obj-$(CONFIG_MFD_PCF50633) += pcf50633.o
obj-$(CONFIG_PCF50633_ADC) += pcf50633-adc.o
obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o
obj-$(CONFIG_RZ_MTU3) += rz-mtu3.o
obj-$(CONFIG_ABX500_CORE) += abx500-core.o
obj-$(CONFIG_MFD_DB8500_PRCMU) += db8500-prcmu.o
# ab8500-core need to come after db8500-prcmu (which provides the channel)
......
drivers/mfd/arizona-i2c.c
View file @ 3af49062
......@@ -112,6 +112,7 @@ static const struct of_device_id arizona_i2c_of_match[] = {
{ .compatible = "wlf,wm1814", .data = (void *)WM1814 },
{},
};
MODULE_DEVICE_TABLE(of, arizona_i2c_of_match);
#endif
static struct i2c_driver arizona_i2c_driver = {
......
drivers/mfd/arizona-spi.c
View file @ 3af49062
......@@ -277,6 +277,7 @@ static const struct of_device_id arizona_spi_of_match[] = {
{ .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 },
{},
};
MODULE_DEVICE_TABLE(of, arizona_spi_of_match);
#endif
static struct spi_driver arizona_spi_driver = {
......
drivers/mfd/atc260x-i2c.c
View file @ 3af49062
......@@ -51,7 +51,7 @@ MODULE_DEVICE_TABLE(of, atc260x_i2c_of_match);
static struct i2c_driver atc260x_i2c_driver = {
.driver = {
.name = "atc260x",
.of_match_table = of_match_ptr(atc260x_i2c_of_match),
.of_match_table = atc260x_i2c_of_match,
},
.probe_new = atc260x_i2c_probe,
};
......
drivers/mfd/atmel-flexcom.c
View file @ 3af49062
......@@ -37,7 +37,6 @@ struct atmel_flexcom {
static int atmel_flexcom_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct resource *res;
struct atmel_flexcom *ddata;
int err;
......@@ -55,8 +54,7 @@ static int atmel_flexcom_probe(struct platform_device *pdev)
ddata->opmode > ATMEL_FLEXCOM_MODE_TWI)
return -EINVAL;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
ddata->base = devm_ioremap_resource(&pdev->dev, res);
ddata->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
if (IS_ERR(ddata->base))
return PTR_ERR(ddata->base);
......
drivers/mfd/atmel-smc.c
View file @ 3af49062
......@@ -323,7 +323,7 @@ static const struct atmel_hsmc_reg_layout sama5d2_reg_layout = {
.timing_regs_offset = 0x700,
};
static const struct of_device_id atmel_smc_ids[] = {
static const struct of_device_id atmel_smc_ids[] __maybe_unused = {
{ .compatible = "atmel,at91sam9260-smc", .data = NULL },
{ .compatible = "atmel,sama5d3-smc", .data = &sama5d3_reg_layout },
{ .compatible = "atmel,sama5d2-smc", .data = &sama5d2_reg_layout },
......
drivers/mfd/axp20x-i2c.c
View file @ 3af49062
......@@ -65,6 +65,7 @@ static const struct of_device_id axp20x_i2c_of_match[] = {
{ .compatible = "x-powers,axp223", .data = (void *)AXP223_ID },
{ .compatible = "x-powers,axp803", .data = (void *)AXP803_ID },
{ .compatible = "x-powers,axp806", .data = (void *)AXP806_ID },
{ .compatible = "x-powers,axp15060", .data = (void *)AXP15060_ID },
{ },
};
MODULE_DEVICE_TABLE(of, axp20x_i2c_of_match);
......@@ -78,6 +79,7 @@ static const struct i2c_device_id axp20x_i2c_id[] = {
{ "axp223", 0 },
{ "axp803", 0 },
{ "axp806", 0 },
{ "axp15060", 0 },
{ },
};
MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id);
......
drivers/mfd/axp20x.c
View file @ 3af49062
......@@ -43,6 +43,7 @@ static const char * const axp20x_model_names[] = {
"AXP806",
"AXP809",
"AXP813",
"AXP15060",
};
static const struct regmap_range axp152_writeable_ranges[] = {
......@@ -119,6 +120,7 @@ static const struct regmap_access_table axp22x_volatile_table = {
/* AXP288 ranges are shared with the AXP803, as they cover the same range */
static const struct regmap_range axp288_writeable_ranges[] = {
regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON),
regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
};
......@@ -168,6 +170,31 @@ static const struct regmap_access_table axp806_volatile_table = {
.n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges),
};
static const struct regmap_range axp15060_writeable_ranges[] = {
regmap_reg_range(AXP15060_PWR_OUT_CTRL1, AXP15060_DCDC_MODE_CTRL2),
regmap_reg_range(AXP15060_OUTPUT_MONITOR_DISCHARGE, AXP15060_CPUSLDO_V_CTRL),
regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
regmap_reg_range(AXP15060_PEK_KEY, AXP15060_PEK_KEY),
regmap_reg_range(AXP15060_IRQ1_EN, AXP15060_IRQ2_EN),
regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
};
static const struct regmap_range axp15060_volatile_ranges[] = {
regmap_reg_range(AXP15060_STARTUP_SRC, AXP15060_STARTUP_SRC),
regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
};
static const struct regmap_access_table axp15060_writeable_table = {
.yes_ranges = axp15060_writeable_ranges,
.n_yes_ranges = ARRAY_SIZE(axp15060_writeable_ranges),
};
static const struct regmap_access_table axp15060_volatile_table = {
.yes_ranges = axp15060_volatile_ranges,
.n_yes_ranges = ARRAY_SIZE(axp15060_volatile_ranges),
};
static const struct resource axp152_pek_resources[] = {
DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
......@@ -236,6 +263,11 @@ static const struct resource axp809_pek_resources[] = {
DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
};
static const struct resource axp15060_pek_resources[] = {
DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
};
static const struct regmap_config axp152_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
......@@ -281,6 +313,15 @@ static const struct regmap_config axp806_regmap_config = {
.cache_type = REGCACHE_RBTREE,
};
static const struct regmap_config axp15060_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.wr_table = &axp15060_writeable_table,
.volatile_table = &axp15060_volatile_table,
.max_register = AXP15060_IRQ2_STATE,
.cache_type = REGCACHE_RBTREE,
};
#define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
[_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
......@@ -502,6 +543,23 @@ static const struct regmap_irq axp809_regmap_irqs[] = {
INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
};
static const struct regmap_irq axp15060_regmap_irqs[] = {
INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV1, 0, 0),
INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV2, 0, 1),
INIT_REGMAP_IRQ(AXP15060, DCDC1_V_LOW, 0, 2),
INIT_REGMAP_IRQ(AXP15060, DCDC2_V_LOW, 0, 3),
INIT_REGMAP_IRQ(AXP15060, DCDC3_V_LOW, 0, 4),
INIT_REGMAP_IRQ(AXP15060, DCDC4_V_LOW, 0, 5),
INIT_REGMAP_IRQ(AXP15060, DCDC5_V_LOW, 0, 6),
INIT_REGMAP_IRQ(AXP15060, DCDC6_V_LOW, 0, 7),
INIT_REGMAP_IRQ(AXP15060, PEK_LONG, 1, 0),
INIT_REGMAP_IRQ(AXP15060, PEK_SHORT, 1, 1),
INIT_REGMAP_IRQ(AXP15060, GPIO1_INPUT, 1, 2),
INIT_REGMAP_IRQ(AXP15060, PEK_FAL_EDGE, 1, 3),
INIT_REGMAP_IRQ(AXP15060, PEK_RIS_EDGE, 1, 4),
INIT_REGMAP_IRQ(AXP15060, GPIO2_INPUT, 1, 5),
};
static const struct regmap_irq_chip axp152_regmap_irq_chip = {
.name = "axp152_irq_chip",
.status_base = AXP152_IRQ1_STATE,
......@@ -581,6 +639,17 @@ static const struct regmap_irq_chip axp809_regmap_irq_chip = {
.num_regs = 5,
};
static const struct regmap_irq_chip axp15060_regmap_irq_chip = {
.name = "axp15060",
.status_base = AXP15060_IRQ1_STATE,
.ack_base = AXP15060_IRQ1_STATE,
.unmask_base = AXP15060_IRQ1_EN,
.init_ack_masked = true,
.irqs = axp15060_regmap_irqs,
.num_irqs = ARRAY_SIZE(axp15060_regmap_irqs),
.num_regs = 2,
};
static const struct mfd_cell axp20x_cells[] = {
{
.name = "axp20x-gpio",
......@@ -825,6 +894,23 @@ static const struct mfd_cell axp813_cells[] = {
},
};
static const struct mfd_cell axp15060_cells[] = {
{
.name = "axp221-pek",
.num_resources = ARRAY_SIZE(axp15060_pek_resources),
.resources = axp15060_pek_resources,
}, {
.name = "axp20x-regulator",
},
};
/* For boards that don't have IRQ line connected to SOC. */
static const struct mfd_cell axp_regulator_only_cells[] = {
{
.name = "axp20x-regulator",
},
};
static int axp20x_power_off(struct sys_off_data *data)
{
struct axp20x_dev *axp20x = data->cb_data;
......@@ -934,6 +1020,28 @@ int axp20x_match_device(struct axp20x_dev *axp20x)
*/
axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
break;
case AXP15060_ID:
/*
* Don't register the power key part if there is no interrupt
* line.
*
* Since most use cases of AXP PMICs are Allwinner SOCs, board
* designers follow Allwinner's reference design and connects
* IRQ line to SOC, there's no need for those variants to deal
* with cases that IRQ isn't connected. However, AXP15660 is
* used by some other vendors' SOCs that didn't connect IRQ
* line, we need to deal with this case.
*/
if (axp20x->irq > 0) {
axp20x->nr_cells = ARRAY_SIZE(axp15060_cells);
axp20x->cells = axp15060_cells;
} else {
axp20x->nr_cells = ARRAY_SIZE(axp_regulator_only_cells);
axp20x->cells = axp_regulator_only_cells;
}
axp20x->regmap_cfg = &axp15060_regmap_config;
axp20x->regmap_irq_chip = &axp15060_regmap_irq_chip;
break;
default:
dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
return -EINVAL;
......
drivers/mfd/bcm2835-pm.c
View file @ 3af49062
......@@ -28,7 +28,7 @@ static const struct mfd_cell bcm2835_power_devs[] = {
static int bcm2835_pm_get_pdata(struct platform_device *pdev,
struct bcm2835_pm *pm)
{
if (of_find_property(pm->dev->of_node, "reg-names", NULL)) {
if (of_property_present(pm->dev->of_node, "reg-names")) {
struct resource *res;
pm->base = devm_platform_ioremap_resource_byname(pdev, "pm");
......@@ -123,4 +123,3 @@ module_platform_driver(bcm2835_pm_driver);
MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
MODULE_DESCRIPTION("Driver for Broadcom BCM2835 PM MFD");
MODULE_LICENSE("GPL");
drivers/mfd/da903x.c
View file @ 3af49062
......@@ -563,4 +563,3 @@ module_exit(da903x_exit);
MODULE_DESCRIPTION("PMIC Driver for Dialog Semiconductor DA9034");
MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>");
MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
MODULE_LICENSE("GPL v2");
drivers/mfd/da9052-core.c
View file @ 3af49062
......@@ -653,4 +653,3 @@ void da9052_device_exit(struct da9052 *da9052)
MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
MODULE_DESCRIPTION("DA9052 MFD Core");
MODULE_LICENSE("GPL");
drivers/mfd/da9052-i2c.c
View file @ 3af49062
......@@ -209,4 +209,3 @@ module_exit(da9052_i2c_exit);
MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
MODULE_DESCRIPTION("I2C driver for Dialog DA9052 PMIC");
MODULE_LICENSE("GPL");
drivers/mfd/da9052-spi.c
View file @ 3af49062
......@@ -102,4 +102,3 @@ module_exit(da9052_spi_exit);
MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
MODULE_DESCRIPTION("SPI driver for Dialog DA9052 PMIC");
MODULE_LICENSE("GPL");
drivers/mfd/da9055-core.c
View file @ 3af49062
......@@ -398,5 +398,4 @@ void da9055_device_exit(struct da9055 *da9055)
}
MODULE_DESCRIPTION("Core support for the DA9055 PMIC");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
drivers/mfd/da9055-i2c.c
View file @ 3af49062
......@@ -97,4 +97,3 @@ module_exit(da9055_i2c_exit);
MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
MODULE_DESCRIPTION("I2C driver for Dialog DA9055 PMIC");
MODULE_LICENSE("GPL");
drivers/mfd/da9062-core.c
View file @ 3af49062
......@@ -181,35 +181,25 @@ static const struct resource da9061_onkey_resources[] = {
DEFINE_RES_IRQ_NAMED(DA9061_IRQ_ONKEY, "ONKEY"),
};
static const struct mfd_cell da9061_devs[] = {
{
.name = "da9061-core",
.num_resources = ARRAY_SIZE(da9061_core_resources),
.resources = da9061_core_resources,
},
{
.name = "da9062-regulators",
.num_resources = ARRAY_SIZE(da9061_regulators_resources),
.resources = da9061_regulators_resources,
},
{
.name = "da9061-watchdog",
.num_resources = ARRAY_SIZE(da9061_wdt_resources),
.resources = da9061_wdt_resources,
.of_compatible = "dlg,da9061-watchdog",
},
{
.name = "da9061-thermal",
.num_resources = ARRAY_SIZE(da9061_thermal_resources),
.resources = da9061_thermal_resources,
.of_compatible = "dlg,da9061-thermal",
},
{
.name = "da9061-onkey",
.num_resources = ARRAY_SIZE(da9061_onkey_resources),
.resources = da9061_onkey_resources,
.of_compatible = "dlg,da9061-onkey",
},
static const struct mfd_cell da9061_devs_irq[] = {
MFD_CELL_OF("da9061-core", da9061_core_resources, NULL, 0, 0,
NULL),
MFD_CELL_OF("da9062-regulators", da9061_regulators_resources, NULL, 0, 0,
NULL),
MFD_CELL_OF("da9061-watchdog", da9061_wdt_resources, NULL, 0, 0,
"dlg,da9061-watchdog"),
MFD_CELL_OF("da9061-thermal", da9061_thermal_resources, NULL, 0, 0,
"dlg,da9061-thermal"),
MFD_CELL_OF("da9061-onkey", da9061_onkey_resources, NULL, 0, 0,
"dlg,da9061-onkey"),
};
static const struct mfd_cell da9061_devs_noirq[] = {
MFD_CELL_OF("da9061-core", NULL, NULL, 0, 0, NULL),
MFD_CELL_OF("da9062-regulators", NULL, NULL, 0, 0, NULL),
MFD_CELL_OF("da9061-watchdog", NULL, NULL, 0, 0, "dlg,da9061-watchdog"),
MFD_CELL_OF("da9061-thermal", NULL, NULL, 0, 0, "dlg,da9061-thermal"),
MFD_CELL_OF("da9061-onkey", NULL, NULL, 0, 0, "dlg,da9061-onkey"),
};
static const struct resource da9062_core_resources[] = {
......@@ -245,47 +235,31 @@ static const struct resource da9062_gpio_resources[] = {
DEFINE_RES_NAMED(DA9062_IRQ_GPI4, 1, "GPI4", IORESOURCE_IRQ),
};
static const struct mfd_cell da9062_devs[] = {
{
.name = "da9062-core",
.num_resources = ARRAY_SIZE(da9062_core_resources),
.resources = da9062_core_resources,
},
{
.name = "da9062-regulators",
.num_resources = ARRAY_SIZE(da9062_regulators_resources),
.resources = da9062_regulators_resources,
},
{
.name = "da9062-watchdog",
.num_resources = ARRAY_SIZE(da9062_wdt_resources),
.resources = da9062_wdt_resources,
.of_compatible = "dlg,da9062-watchdog",
},
{
.name = "da9062-thermal",
.num_resources = ARRAY_SIZE(da9062_thermal_resources),
.resources = da9062_thermal_resources,
.of_compatible = "dlg,da9062-thermal",
},
{
.name = "da9062-rtc",
.num_resources = ARRAY_SIZE(da9062_rtc_resources),
.resources = da9062_rtc_resources,
.of_compatible = "dlg,da9062-rtc",
},
{
.name = "da9062-onkey",
.num_resources = ARRAY_SIZE(da9062_onkey_resources),
.resources = da9062_onkey_resources,
.of_compatible = "dlg,da9062-onkey",
},
{
.name = "da9062-gpio",
.num_resources = ARRAY_SIZE(da9062_gpio_resources),
.resources = da9062_gpio_resources,
.of_compatible = "dlg,da9062-gpio",
},
static const struct mfd_cell da9062_devs_irq[] = {
MFD_CELL_OF("da9062-core", da9062_core_resources, NULL, 0, 0,
NULL),
MFD_CELL_OF("da9062-regulators", da9062_regulators_resources, NULL, 0, 0,
NULL),
MFD_CELL_OF("da9062-watchdog", da9062_wdt_resources, NULL, 0, 0,
"dlg,da9062-watchdog"),
MFD_CELL_OF("da9062-thermal", da9062_thermal_resources, NULL, 0, 0,
"dlg,da9062-thermal"),
MFD_CELL_OF("da9062-rtc", da9062_rtc_resources, NULL, 0, 0,
"dlg,da9062-rtc"),
MFD_CELL_OF("da9062-onkey", da9062_onkey_resources, NULL, 0, 0,
"dlg,da9062-onkey"),
MFD_CELL_OF("da9062-gpio", da9062_gpio_resources, NULL, 0, 0,
"dlg,da9062-gpio"),
};
static const struct mfd_cell da9062_devs_noirq[] = {
MFD_CELL_OF("da9062-core", NULL, NULL, 0, 0, NULL),
MFD_CELL_OF("da9062-regulators", NULL, NULL, 0, 0, NULL),
MFD_CELL_OF("da9062-watchdog", NULL, NULL, 0, 0, "dlg,da9062-watchdog"),
MFD_CELL_OF("da9062-thermal", NULL, NULL, 0, 0, "dlg,da9062-thermal"),
MFD_CELL_OF("da9062-rtc", NULL, NULL, 0, 0, "dlg,da9062-rtc"),
MFD_CELL_OF("da9062-onkey", NULL, NULL, 0, 0, "dlg,da9062-onkey"),
MFD_CELL_OF("da9062-gpio", NULL, NULL, 0, 0, "dlg,da9062-gpio"),
};
static int da9062_clear_fault_log(struct da9062 *chip)
......@@ -625,7 +599,7 @@ static int da9062_i2c_probe(struct i2c_client *i2c)
{
const struct i2c_device_id *id = i2c_client_get_device_id(i2c);
struct da9062 *chip;
unsigned int irq_base;
unsigned int irq_base = 0;
const struct mfd_cell *cell;
const struct regmap_irq_chip *irq_chip;
const struct regmap_config *config;
......@@ -645,22 +619,16 @@ static int da9062_i2c_probe(struct i2c_client *i2c)
i2c_set_clientdata(i2c, chip);
chip->dev = &i2c->dev;
if (!i2c->irq) {
dev_err(chip->dev, "No IRQ configured\n");
return -EINVAL;
}
/* Start with a base configuration without IRQ */
switch (chip->chip_type) {
case COMPAT_TYPE_DA9061:
cell = da9061_devs;
cell_num = ARRAY_SIZE(da9061_devs);
irq_chip = &da9061_irq_chip;
cell = da9061_devs_noirq;
cell_num = ARRAY_SIZE(da9061_devs_noirq);
config = &da9061_regmap_config;
break;
case COMPAT_TYPE_DA9062:
cell = da9062_devs;
cell_num = ARRAY_SIZE(da9062_devs);
irq_chip = &da9062_irq_chip;
cell = da9062_devs_noirq;
cell_num = ARRAY_SIZE(da9062_devs_noirq);
config = &da9062_regmap_config;
break;
default:
......@@ -695,29 +663,43 @@ static int da9062_i2c_probe(struct i2c_client *i2c)
if (ret)
return ret;
ret = da9062_configure_irq_type(chip, i2c->irq, &trigger_type);
if (ret < 0) {
dev_err(chip->dev, "Failed to configure IRQ type\n");
return ret;
}
/* If IRQ is available, reconfigure it accordingly */
if (i2c->irq) {
if (chip->chip_type == COMPAT_TYPE_DA9061) {
cell = da9061_devs_irq;
cell_num = ARRAY_SIZE(da9061_devs_irq);
irq_chip = &da9061_irq_chip;
} else {
cell = da9062_devs_irq;
cell_num = ARRAY_SIZE(da9062_devs_irq);
irq_chip = &da9062_irq_chip;
}
ret = regmap_add_irq_chip(chip->regmap, i2c->irq,
trigger_type | IRQF_SHARED | IRQF_ONESHOT,
-1, irq_chip, &chip->regmap_irq);
if (ret) {
dev_err(chip->dev, "Failed to request IRQ %d: %d\n",
i2c->irq, ret);
return ret;
}
ret = da9062_configure_irq_type(chip, i2c->irq, &trigger_type);
if (ret < 0) {
dev_err(chip->dev, "Failed to configure IRQ type\n");
return ret;
}
irq_base = regmap_irq_chip_get_base(chip->regmap_irq);
ret = regmap_add_irq_chip(chip->regmap, i2c->irq,
trigger_type | IRQF_SHARED | IRQF_ONESHOT,
-1, irq_chip, &chip->regmap_irq);
if (ret) {
dev_err(chip->dev, "Failed to request IRQ %d: %d\n",
i2c->irq, ret);
return ret;
}
irq_base = regmap_irq_chip_get_base(chip->regmap_irq);
}
ret = mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, cell,
cell_num, NULL, irq_base,
NULL);
if (ret) {
dev_err(chip->dev, "Cannot register child devices\n");
regmap_del_irq_chip(i2c->irq, chip->regmap_irq);
if (i2c->irq)
regmap_del_irq_chip(i2c->irq, chip->regmap_irq);
return ret;
}
......
drivers/mfd/dln2.c
View file @ 3af49062
......@@ -827,6 +827,7 @@ static int dln2_probe(struct usb_interface *interface,
dln2_stop_rx_urbs(dln2);
out_free:
usb_put_dev(dln2->usb_dev);
dln2_free(dln2);
return ret;
......
drivers/mfd/ezx-pcap.c
View file @ 3af49062
......@@ -528,7 +528,6 @@ static void __exit ezx_pcap_exit(void)
subsys_initcall(ezx_pcap_init);
module_exit(ezx_pcap_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Daniel Ribeiro / Harald Welte");
MODULE_DESCRIPTION("Motorola PCAP2 ASIC Driver");
MODULE_ALIAS("spi:ezx-pcap");
drivers/mfd/hi6421-pmic-core.c
View file @ 3af49062
......@@ -50,7 +50,6 @@ MODULE_DEVICE_TABLE(of, of_hi6421_pmic_match);
static int hi6421_pmic_probe(struct platform_device *pdev)
{
struct hi6421_pmic *pmic;
struct resource *res;
const struct of_device_id *id;
const struct mfd_cell *subdevs;
enum hi6421_type type;
......@@ -66,8 +65,7 @@ static int hi6421_pmic_probe(struct platform_device *pdev)
if (!pmic)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
base = devm_ioremap_resource(&pdev->dev, res);
base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
if (IS_ERR(base))
return PTR_ERR(base);
......
drivers/mfd/intel-lpss-pci.c
View file @ 3af49062
......@@ -447,6 +447,21 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
{ PCI_VDEVICE(INTEL, 0x7e79), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7e7a), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7e7b), (kernel_ulong_t)&bxt_i2c_info },
/* MTP-S */
{ PCI_VDEVICE(INTEL, 0x7f28), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x7f29), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x7f2a), (kernel_ulong_t)&tgl_info },
{ PCI_VDEVICE(INTEL, 0x7f2b), (kernel_ulong_t)&tgl_info },
{ PCI_VDEVICE(INTEL, 0x7f4c), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7f4d), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7f4e), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7f4f), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7f5c), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x7f5d), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x7f5e), (kernel_ulong_t)&tgl_info },
{ PCI_VDEVICE(INTEL, 0x7f5f), (kernel_ulong_t)&tgl_info },
{ PCI_VDEVICE(INTEL, 0x7f7a), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7f7b), (kernel_ulong_t)&bxt_i2c_info },
/* LKF */
{ PCI_VDEVICE(INTEL, 0x98a8), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x98a9), (kernel_ulong_t)&bxt_uart_info },
......
drivers/mfd/intel_soc_pmic_chtwc.c
View file @ 3af49062
......@@ -159,11 +159,19 @@ static const struct dmi_system_id cht_wc_model_dmi_ids[] = {
DMI_MATCH(DMI_PRODUCT_NAME, "Mipad2"),
},
}, {
/* Lenovo Yoga Book X90F / X91F / X91L */
/* Lenovo Yoga Book X90F / X90L */
.driver_data = (void *)(long)INTEL_CHT_WC_LENOVO_YOGABOOK1,
.matches = {
/* Non exact match to match all versions */
DMI_MATCH(DMI_PRODUCT_NAME, "Lenovo YB1-X9"),
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"),
DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "YETI-11"),
},
}, {
/* Lenovo Yoga Book X91F / X91L */
.driver_data = (void *)(long)INTEL_CHT_WC_LENOVO_YOGABOOK1,
.matches = {
/* Non exact match to match F + L versions */
DMI_MATCH(DMI_PRODUCT_NAME, "Lenovo YB1-X91"),
},
}, {
/* Lenovo Yoga Tab 3 Pro YT3-X90F */
......
drivers/mfd/intel_soc_pmic_crc.c
View file @ 3af49062
......@@ -271,6 +271,5 @@ static struct i2c_driver crystal_cove_i2c_driver = {
module_i2c_driver(crystal_cove_i2c_driver);
MODULE_DESCRIPTION("I2C driver for Intel SoC PMIC");
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Yang, Bin <bin.yang@intel.com>");
MODULE_AUTHOR("Zhu, Lejun <lejun.zhu@linux.intel.com>");
drivers/mfd/ipaq-micro.c
View file @ 3af49062
......@@ -381,7 +381,6 @@ static int __maybe_unused micro_resume(struct device *dev)
static int __init micro_probe(struct platform_device *pdev)
{
struct ipaq_micro *micro;
struct resource *res;
int ret;
int irq;
......@@ -391,8 +390,7 @@ static int __init micro_probe(struct platform_device *pdev)
micro->dev = &pdev->dev;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
micro->base = devm_ioremap_resource(&pdev->dev, res);
micro->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
if (IS_ERR(micro->base))
return PTR_ERR(micro->base);
......
drivers/mfd/khadas-mcu.c
View file @ 3af49062
......@@ -112,7 +112,7 @@ static int khadas_mcu_probe(struct i2c_client *client)
if (ret)
return ret;
if (of_find_property(dev->of_node, "#cooling-cells", NULL))
if (of_property_present(dev->of_node, "#cooling-cells"))
return devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
khadas_mcu_fan_cells,
ARRAY_SIZE(khadas_mcu_fan_cells),
......
drivers/mfd/lp8788.c
View file @ 3af49062
......@@ -244,4 +244,3 @@ module_exit(lp8788_exit);
MODULE_DESCRIPTION("TI LP8788 MFD Driver");
MODULE_AUTHOR("Milo Kim");
MODULE_LICENSE("GPL");
drivers/mfd/mfd-core.c
View file @ 3af49062
......@@ -33,32 +33,6 @@ static struct device_type mfd_dev_type = {
.name = "mfd_device",
};
int mfd_cell_enable(struct platform_device *pdev)
{
const struct mfd_cell *cell = mfd_get_cell(pdev);
if (!cell->enable) {
dev_dbg(&pdev->dev, "No .enable() call-back registered\n");
return 0;
}
return cell->enable(pdev);
}
EXPORT_SYMBOL(mfd_cell_enable);
int mfd_cell_disable(struct platform_device *pdev)
{
const struct mfd_cell *cell = mfd_get_cell(pdev);
if (!cell->disable) {
dev_dbg(&pdev->dev, "No .disable() call-back registered\n");
return 0;
}
return cell->disable(pdev);
}
EXPORT_SYMBOL(mfd_cell_disable);
#if IS_ENABLED(CONFIG_ACPI)
struct match_ids_walk_data {
struct acpi_device_id *ids;
......
drivers/mfd/ocelot-spi.c
View file @ 3af49062
......@@ -130,6 +130,7 @@ static const struct regmap_config ocelot_spi_regmap_config = {
.write_flag_mask = 0x80,
.use_single_read = true,
.use_single_write = true,
.can_multi_write = false,
......
drivers/mfd/omap-usb-host.c
View file @ 3af49062
......@@ -853,7 +853,6 @@ static struct platform_driver usbhs_omap_driver = {
MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("usb host common core driver for omap EHCI and OHCI");
static int omap_usbhs_drvinit(void)
......
drivers/mfd/omap-usb-tll.c
View file @ 3af49062
......@@ -125,11 +125,6 @@ static inline void usbtll_writeb(void __iomem *base, u32 reg, u8 val)
writeb_relaxed(val, base + reg);
}
static inline u8 usbtll_readb(void __iomem *base, u32 reg)
{
return readb_relaxed(base + reg);
}
/*-------------------------------------------------------------------------*/
static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
......@@ -450,7 +445,6 @@ EXPORT_SYMBOL_GPL(omap_tll_disable);
MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");
static int __init omap_usbtll_drvinit(void)
......
drivers/mfd/qcom-pm8008.c
View file @ 3af49062
......@@ -44,37 +44,16 @@ enum {
#define PM8008_GPIO1_ADDR PM8008_PERIPH_2_BASE
#define PM8008_GPIO2_ADDR PM8008_PERIPH_3_BASE
#define PM8008_STATUS_BASE (PM8008_PERIPH_0_BASE | INT_LATCHED_STS_OFFSET)
#define PM8008_MASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_SET_OFFSET)
#define PM8008_UNMASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_CLR_OFFSET)
#define PM8008_TYPE_BASE (PM8008_PERIPH_0_BASE | INT_SET_TYPE_OFFSET)
#define PM8008_ACK_BASE (PM8008_PERIPH_0_BASE | INT_LATCHED_CLR_OFFSET)
#define PM8008_POLARITY_HI_BASE (PM8008_PERIPH_0_BASE | INT_POL_HIGH_OFFSET)
#define PM8008_POLARITY_LO_BASE (PM8008_PERIPH_0_BASE | INT_POL_LOW_OFFSET)
#define PM8008_PERIPH_OFFSET(paddr) (paddr - PM8008_PERIPH_0_BASE)
static unsigned int p0_offs[] = {PM8008_PERIPH_OFFSET(PM8008_PERIPH_0_BASE)};
static unsigned int p1_offs[] = {PM8008_PERIPH_OFFSET(PM8008_PERIPH_1_BASE)};
static unsigned int p2_offs[] = {PM8008_PERIPH_OFFSET(PM8008_PERIPH_2_BASE)};
static unsigned int p3_offs[] = {PM8008_PERIPH_OFFSET(PM8008_PERIPH_3_BASE)};
static struct regmap_irq_sub_irq_map pm8008_sub_reg_offsets[] = {
REGMAP_IRQ_MAIN_REG_OFFSET(p0_offs),
REGMAP_IRQ_MAIN_REG_OFFSET(p1_offs),
REGMAP_IRQ_MAIN_REG_OFFSET(p2_offs),
REGMAP_IRQ_MAIN_REG_OFFSET(p3_offs),
};
static unsigned int pm8008_virt_regs[] = {
PM8008_POLARITY_HI_BASE,
PM8008_POLARITY_LO_BASE,
};
enum {
SET_TYPE_INDEX,
POLARITY_HI_INDEX,
POLARITY_LO_INDEX,
PM8008_NUM_VIRT_REGS,
};
static unsigned int pm8008_config_regs[] = {
INT_SET_TYPE_OFFSET,
INT_POL_HIGH_OFFSET,
INT_POL_LOW_OFFSET,
};
static struct regmap_irq pm8008_irqs[] = {
......@@ -88,32 +67,54 @@ static struct regmap_irq pm8008_irqs[] = {
REGMAP_IRQ_REG(PM8008_IRQ_GPIO2, PM8008_GPIO2, BIT(0)),
};
static int pm8008_set_type_virt(unsigned int **virt_buf,
unsigned int type, unsigned long hwirq,
int reg)
static const unsigned int pm8008_periph_base[] = {
PM8008_PERIPH_0_BASE,
PM8008_PERIPH_1_BASE,
PM8008_PERIPH_2_BASE,
PM8008_PERIPH_3_BASE,
};
static unsigned int pm8008_get_irq_reg(struct regmap_irq_chip_data *data,
unsigned int base, int index)
{
/* Simple linear addressing for the main status register */
if (base == I2C_INTR_STATUS_BASE)
return base + index;
return pm8008_periph_base[index] + base;
}
static int pm8008_set_type_config(unsigned int **buf, unsigned int type,
const struct regmap_irq *irq_data, int idx,
void *irq_drv_data)
{
switch (type) {
case IRQ_TYPE_EDGE_FALLING:
case IRQ_TYPE_LEVEL_LOW:
virt_buf[POLARITY_HI_INDEX][reg] &= ~pm8008_irqs[hwirq].mask;
virt_buf[POLARITY_LO_INDEX][reg] |= pm8008_irqs[hwirq].mask;
buf[POLARITY_HI_INDEX][idx] &= ~irq_data->mask;
buf[POLARITY_LO_INDEX][idx] |= irq_data->mask;
break;
case IRQ_TYPE_EDGE_RISING:
case IRQ_TYPE_LEVEL_HIGH:
virt_buf[POLARITY_HI_INDEX][reg] |= pm8008_irqs[hwirq].mask;
virt_buf[POLARITY_LO_INDEX][reg] &= ~pm8008_irqs[hwirq].mask;
buf[POLARITY_HI_INDEX][idx] |= irq_data->mask;
buf[POLARITY_LO_INDEX][idx] &= ~irq_data->mask;
break;
case IRQ_TYPE_EDGE_BOTH:
virt_buf[POLARITY_HI_INDEX][reg] |= pm8008_irqs[hwirq].mask;
virt_buf[POLARITY_LO_INDEX][reg] |= pm8008_irqs[hwirq].mask;
buf[POLARITY_HI_INDEX][idx] |= irq_data->mask;
buf[POLARITY_LO_INDEX][idx] |= irq_data->mask;
break;
default:
return -EINVAL;
}
if (type & IRQ_TYPE_EDGE_BOTH)
buf[SET_TYPE_INDEX][idx] |= irq_data->mask;
else
buf[SET_TYPE_INDEX][idx] &= ~irq_data->mask;
return 0;
}
......@@ -121,20 +122,19 @@ static struct regmap_irq_chip pm8008_irq_chip = {
.name = "pm8008_irq",
.main_status = I2C_INTR_STATUS_BASE,
.num_main_regs = 1,
.num_virt_regs = PM8008_NUM_VIRT_REGS,
.irqs = pm8008_irqs,
.num_irqs = ARRAY_SIZE(pm8008_irqs),
.num_regs = PM8008_NUM_PERIPHS,
.not_fixed_stride = true,
.sub_reg_offsets = pm8008_sub_reg_offsets,
.set_type_virt = pm8008_set_type_virt,
.status_base = PM8008_STATUS_BASE,
.mask_base = PM8008_MASK_BASE,
.unmask_base = PM8008_UNMASK_BASE,
.type_base = PM8008_TYPE_BASE,
.ack_base = PM8008_ACK_BASE,
.virt_reg_base = pm8008_virt_regs,
.num_type_reg = PM8008_NUM_PERIPHS,
.status_base = INT_LATCHED_STS_OFFSET,
.mask_base = INT_EN_CLR_OFFSET,
.unmask_base = INT_EN_SET_OFFSET,
.mask_unmask_non_inverted = true,
.ack_base = INT_LATCHED_CLR_OFFSET,
.config_base = pm8008_config_regs,
.num_config_bases = ARRAY_SIZE(pm8008_config_regs),
.num_config_regs = PM8008_NUM_PERIPHS,
.set_type_config = pm8008_set_type_config,
.get_irq_reg = pm8008_get_irq_reg,
};
static struct regmap_config qcom_mfd_regmap_cfg = {
......@@ -143,30 +143,6 @@ static struct regmap_config qcom_mfd_regmap_cfg = {
.max_register = 0xFFFF,
};
static int pm8008_init(struct regmap *regmap)
{
int rc;
/*
* Set TEMP_ALARM peripheral's TYPE so that the regmap-irq framework
* reads this as the default value instead of zero, the HW default.
* This is required to enable the writing of TYPE registers in
* regmap_irq_sync_unlock().
*/
rc = regmap_write(regmap, (PM8008_TEMP_ALARM_ADDR | INT_SET_TYPE_OFFSET), BIT(0));
if (rc)
return rc;
/* Do the same for GPIO1 and GPIO2 peripherals */
rc = regmap_write(regmap, (PM8008_GPIO1_ADDR | INT_SET_TYPE_OFFSET), BIT(0));
if (rc)
return rc;
rc = regmap_write(regmap, (PM8008_GPIO2_ADDR | INT_SET_TYPE_OFFSET), BIT(0));
return rc;
}
static int pm8008_probe_irq_peripherals(struct device *dev,
struct regmap *regmap,
int client_irq)
......@@ -175,20 +151,10 @@ static int pm8008_probe_irq_peripherals(struct device *dev,
struct regmap_irq_type *type;
struct regmap_irq_chip_data *irq_data;
rc = pm8008_init(regmap);
if (rc) {
dev_err(dev, "Init failed: %d\n", rc);
return rc;
}
for (i = 0; i < ARRAY_SIZE(pm8008_irqs); i++) {
type = &pm8008_irqs[i].type;
type->type_reg_offset = pm8008_irqs[i].reg_offset;
type->type_rising_val = pm8008_irqs[i].mask;
type->type_falling_val = pm8008_irqs[i].mask;
type->type_level_high_val = 0;
type->type_level_low_val = 0;
type->type_reg_offset = pm8008_irqs[i].reg_offset;
if (type->type_reg_offset == PM8008_MISC)
type->types_supported = IRQ_TYPE_EDGE_RISING;
......
drivers/mfd/qcom_rpm.c
View file @ 3af49062
......@@ -530,7 +530,6 @@ static int qcom_rpm_probe(struct platform_device *pdev)
{
const struct of_device_id *match;
struct device_node *syscon_np;
struct resource *res;
struct qcom_rpm *rpm;
u32 fw_version[3];
int irq_wakeup;
......@@ -576,8 +575,7 @@ static int qcom_rpm_probe(struct platform_device *pdev)
return -ENODEV;
rpm->data = match->data;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
rpm->status_regs = devm_ioremap_resource(&pdev->dev, res);
rpm->status_regs = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
if (IS_ERR(rpm->status_regs))
return PTR_ERR(rpm->status_regs);
rpm->ctrl_regs = rpm->status_regs + 0x400;
......
drivers/mfd/rsmu.h
View file @ 3af49062
......@@ -10,6 +10,8 @@
#include <linux/mfd/rsmu.h>
#define RSMU_CM_SCSR_BASE 0x20100000
int rsmu_core_init(struct rsmu_ddata *rsmu);
void rsmu_core_exit(struct rsmu_ddata *rsmu);
......
drivers/mfd/rsmu_i2c.c
View file @ 3af49062
......@@ -18,11 +18,12 @@
#include "rsmu.h"
/*
* 16-bit register address: the lower 8 bits of the register address come
* from the offset addr byte and the upper 8 bits come from the page register.
* 32-bit register address: the lower 8 bits of the register address come
* from the offset addr byte and the upper 24 bits come from the page register.
*/
#define RSMU_CM_PAGE_ADDR 0xFD
#define RSMU_CM_PAGE_WINDOW 256
#define RSMU_CM_PAGE_ADDR 0xFC
#define RSMU_CM_PAGE_MASK 0xFFFFFF00
#define RSMU_CM_ADDRESS_MASK 0x000000FF
/*
* 15-bit register address: the lower 7 bits of the register address come
......@@ -31,18 +32,6 @@
#define RSMU_SABRE_PAGE_ADDR 0x7F
#define RSMU_SABRE_PAGE_WINDOW 128
static const struct regmap_range_cfg rsmu_cm_range_cfg[] = {
{
.range_min = 0,
.range_max = 0xD000,
.selector_reg = RSMU_CM_PAGE_ADDR,
.selector_mask = 0xFF,
.selector_shift = 0,
.window_start = 0,
.window_len = RSMU_CM_PAGE_WINDOW,
}
};
static const struct regmap_range_cfg rsmu_sabre_range_cfg[] = {
{
.range_min = 0,
......@@ -55,35 +44,141 @@ static const struct regmap_range_cfg rsmu_sabre_range_cfg[] = {
}
};
static bool rsmu_cm_volatile_reg(struct device *dev, unsigned int reg)
static bool rsmu_sabre_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case RSMU_CM_PAGE_ADDR:
case RSMU_SABRE_PAGE_ADDR:
return false;
default:
return true;
}
}
static bool rsmu_sabre_volatile_reg(struct device *dev, unsigned int reg)
static int rsmu_read_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes)
{
switch (reg) {
case RSMU_SABRE_PAGE_ADDR:
return false;
default:
return true;
struct i2c_client *client = to_i2c_client(rsmu->dev);
struct i2c_msg msg[2];
int cnt;
msg[0].addr = client->addr;
msg[0].flags = 0;
msg[0].len = 1;
msg[0].buf = &reg;
msg[1].addr = client->addr;
msg[1].flags = I2C_M_RD;
msg[1].len = bytes;
msg[1].buf = buf;
cnt = i2c_transfer(client->adapter, msg, 2);
if (cnt < 0) {
dev_err(rsmu->dev, "i2c_transfer failed at addr: %04x!", reg);
return cnt;
} else if (cnt != 2) {
dev_err(rsmu->dev,
"i2c_transfer sent only %d of 2 messages", cnt);
return -EIO;
}
return 0;
}
static int rsmu_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes)
{
struct i2c_client *client = to_i2c_client(rsmu->dev);
u8 msg[RSMU_MAX_WRITE_COUNT + 1]; /* 1 Byte added for the device register */
int cnt;
if (bytes > RSMU_MAX_WRITE_COUNT)
return -EINVAL;
msg[0] = reg;
memcpy(&msg[1], buf, bytes);
cnt = i2c_master_send(client, msg, bytes + 1);
if (cnt < 0) {
dev_err(&client->dev,
"i2c_master_send failed at addr: %04x!", reg);
return cnt;
}
return 0;
}
static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u32 reg)
{
u32 page = reg & RSMU_CM_PAGE_MASK;
u8 buf[4];
int err;
/* Do not modify offset register for none-scsr registers */
if (reg < RSMU_CM_SCSR_BASE)
return 0;
/* Simply return if we are on the same page */
if (rsmu->page == page)
return 0;
buf[0] = 0x0;
buf[1] = (u8)((page >> 8) & 0xFF);
buf[2] = (u8)((page >> 16) & 0xFF);
buf[3] = (u8)((page >> 24) & 0xFF);
err = rsmu_write_device(rsmu, RSMU_CM_PAGE_ADDR, buf, sizeof(buf));
if (err)
dev_err(rsmu->dev, "Failed to set page offset 0x%x\n", page);
else
/* Remember the last page */
rsmu->page = page;
return err;
}
static int rsmu_reg_read(void *context, unsigned int reg, unsigned int *val)
{
struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context);
u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK);
int err;
err = rsmu_write_page_register(rsmu, reg);
if (err)
return err;
err = rsmu_read_device(rsmu, addr, (u8 *)val, 1);
if (err)
dev_err(rsmu->dev, "Failed to read offset address 0x%x\n", addr);
return err;
}
static int rsmu_reg_write(void *context, unsigned int reg, unsigned int val)
{
struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context);
u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK);
u8 data = (u8)val;
int err;
err = rsmu_write_page_register(rsmu, reg);
if (err)
return err;
err = rsmu_write_device(rsmu, addr, &data, 1);
if (err)
dev_err(rsmu->dev,
"Failed to write offset address 0x%x\n", addr);
return err;
}
static const struct regmap_config rsmu_cm_regmap_config = {
.reg_bits = 8,
.reg_bits = 32,
.val_bits = 8,
.max_register = 0xD000,
.ranges = rsmu_cm_range_cfg,
.num_ranges = ARRAY_SIZE(rsmu_cm_range_cfg),
.volatile_reg = rsmu_cm_volatile_reg,
.cache_type = REGCACHE_RBTREE,
.can_multi_write = true,
.max_register = 0x20120000,
.reg_read = rsmu_reg_read,
.reg_write = rsmu_reg_write,
.cache_type = REGCACHE_NONE,
};
static const struct regmap_config rsmu_sabre_regmap_config = {
......@@ -101,7 +196,7 @@ static const struct regmap_config rsmu_sl_regmap_config = {
.reg_bits = 16,
.val_bits = 8,
.reg_format_endian = REGMAP_ENDIAN_BIG,
.max_register = 0x339,
.max_register = 0x340,
.cache_type = REGCACHE_NONE,
.can_multi_write = true,
};
......@@ -136,7 +231,11 @@ static int rsmu_i2c_probe(struct i2c_client *client)
dev_err(rsmu->dev, "Unsupported RSMU device type: %d\n", rsmu->type);
return -ENODEV;
}
rsmu->regmap = devm_regmap_init_i2c(client, cfg);
if (rsmu->type == RSMU_CM)
rsmu->regmap = devm_regmap_init(&client->dev, NULL, client, cfg);
else
rsmu->regmap = devm_regmap_init_i2c(client, cfg);
if (IS_ERR(rsmu->regmap)) {
ret = PTR_ERR(rsmu->regmap);
dev_err(rsmu->dev, "Failed to allocate register map: %d\n", ret);
......
drivers/mfd/rsmu_spi.c
View file @ 3af49062
......@@ -19,19 +19,21 @@
#define RSMU_CM_PAGE_ADDR 0x7C
#define RSMU_SABRE_PAGE_ADDR 0x7F
#define RSMU_HIGHER_ADDR_MASK 0xFF80
#define RSMU_HIGHER_ADDR_SHIFT 7
#define RSMU_LOWER_ADDR_MASK 0x7F
#define RSMU_PAGE_MASK 0xFFFFFF80
#define RSMU_ADDR_MASK 0x7F
static int rsmu_read_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes)
{
struct spi_device *client = to_spi_device(rsmu->dev);
struct spi_transfer xfer = {0};
struct spi_message msg;
u8 cmd[256] = {0};
u8 rsp[256] = {0};
u8 cmd[RSMU_MAX_READ_COUNT + 1] = {0};
u8 rsp[RSMU_MAX_READ_COUNT + 1] = {0};
int ret;
if (bytes > RSMU_MAX_READ_COUNT)
return -EINVAL;
cmd[0] = reg | 0x80;
xfer.rx_buf = rsp;
xfer.len = bytes + 1;
......@@ -66,7 +68,10 @@ static int rsmu_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes
struct spi_device *client = to_spi_device(rsmu->dev);
struct spi_transfer xfer = {0};
struct spi_message msg;
u8 cmd[256] = {0};
u8 cmd[RSMU_MAX_WRITE_COUNT + 1] = {0};
if (bytes > RSMU_MAX_WRITE_COUNT)
return -EINVAL;
cmd[0] = reg;
memcpy(&cmd[1], buf, bytes);
......@@ -86,26 +91,35 @@ static int rsmu_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes
* 16-bit register address: the lower 7 bits of the register address come
* from the offset addr byte and the upper 9 bits come from the page register.
*/
static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u16 reg)
static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u32 reg)
{
u8 page_reg;
u8 buf[2];
u8 buf[4];
u16 bytes;
u16 page;
u32 page;
int err;
switch (rsmu->type) {
case RSMU_CM:
/* Do not modify page register for none-scsr registers */
if (reg < RSMU_CM_SCSR_BASE)
return 0;
page_reg = RSMU_CM_PAGE_ADDR;
page = reg & RSMU_HIGHER_ADDR_MASK;
page = reg & RSMU_PAGE_MASK;
buf[0] = (u8)(page & 0xff);
buf[1] = (u8)((page >> 8) & 0xff);
bytes = 2;
buf[2] = (u8)((page >> 16) & 0xff);
buf[3] = (u8)((page >> 24) & 0xff);
bytes = 4;
break;
case RSMU_SABRE:
/* Do not modify page register if reg is page register itself */
if ((reg & RSMU_ADDR_MASK) == RSMU_ADDR_MASK)
return 0;
page_reg = RSMU_SABRE_PAGE_ADDR;
page = reg >> RSMU_HIGHER_ADDR_SHIFT;
buf[0] = (u8)(page & 0xff);
page = reg & RSMU_PAGE_MASK;
/* The three page bits are located in the single Page Register */
buf[0] = (u8)((page >> 7) & 0x7);
bytes = 1;
break;
default:
......@@ -130,7 +144,7 @@ static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u16 reg)
static int rsmu_reg_read(void *context, unsigned int reg, unsigned int *val)
{
struct rsmu_ddata *rsmu = spi_get_drvdata((struct spi_device *)context);
u8 addr = (u8)(reg & RSMU_LOWER_ADDR_MASK);
u8 addr = (u8)(reg & RSMU_ADDR_MASK);
int err;
err = rsmu_write_page_register(rsmu, reg);
......@@ -147,7 +161,7 @@ static int rsmu_reg_read(void *context, unsigned int reg, unsigned int *val)
static int rsmu_reg_write(void *context, unsigned int reg, unsigned int val)
{
struct rsmu_ddata *rsmu = spi_get_drvdata((struct spi_device *)context);
u8 addr = (u8)(reg & RSMU_LOWER_ADDR_MASK);
u8 addr = (u8)(reg & RSMU_ADDR_MASK);
u8 data = (u8)val;
int err;
......@@ -164,9 +178,9 @@ static int rsmu_reg_write(void *context, unsigned int reg, unsigned int val)
}
static const struct regmap_config rsmu_cm_regmap_config = {
.reg_bits = 16,
.reg_bits = 32,
.val_bits = 8,
.max_register = 0xD000,
.max_register = 0x20120000,
.reg_read = rsmu_reg_read,
.reg_write = rsmu_reg_write,
.cache_type = REGCACHE_NONE,
......
drivers/mfd/rz-mtu3.c 0 → 100644
View file @ 3af49062
This diff is collapsed.
drivers/mfd/rz-mtu3.h 0 → 100644
View file @ 3af49062
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* MFD internals for Renesas RZ/G2L MTU3 Core driver
*
* Copyright (C) 2023 Renesas Electronics Corporation
*/
#ifndef RZ_MTU3_MFD_H
#define RZ_MTU3_MFD_H
#define MTU_8BIT_CH_0(_tier, _nfcr, _tcr, _tcr2, _tmdr1, _tiorh, _tiorl, _tbtm) \
{ \
[RZ_MTU3_TIER] = _tier, \
[RZ_MTU3_NFCR] = _nfcr, \
[RZ_MTU3_TCR] = _tcr, \
[RZ_MTU3_TCR2] = _tcr2, \
[RZ_MTU3_TMDR1] = _tmdr1, \
[RZ_MTU3_TIORH] = _tiorh, \
[RZ_MTU3_TIORL] = _tiorl, \
[RZ_MTU3_TBTM] = _tbtm \
}
#define MTU_8BIT_CH_1_2(_tier, _nfcr, _tsr, _tcr, _tcr2, _tmdr1, _tior) \
{ \
[RZ_MTU3_TIER] = _tier, \
[RZ_MTU3_NFCR] = _nfcr, \
[RZ_MTU3_TSR] = _tsr, \
[RZ_MTU3_TCR] = _tcr, \
[RZ_MTU3_TCR2] = _tcr2, \
[RZ_MTU3_TMDR1] = _tmdr1, \
[RZ_MTU3_TIOR] = _tior \
} \
#define MTU_8BIT_CH_3_4_6_7(_tier, _nfcr, _tsr, _tcr, _tcr2, _tmdr1, _tiorh, _tiorl, _tbtm) \
{ \
[RZ_MTU3_TIER] = _tier, \
[RZ_MTU3_NFCR] = _nfcr, \
[RZ_MTU3_TSR] = _tsr, \
[RZ_MTU3_TCR] = _tcr, \
[RZ_MTU3_TCR2] = _tcr2, \
[RZ_MTU3_TMDR1] = _tmdr1, \
[RZ_MTU3_TIORH] = _tiorh, \
[RZ_MTU3_TIORL] = _tiorl, \
[RZ_MTU3_TBTM] = _tbtm \
} \
#define MTU_8BIT_CH_5(_tier, _nfcr, _tstr, _tcntcmpclr, _tcru, _tcr2u, _tioru, \
_tcrv, _tcr2v, _tiorv, _tcrw, _tcr2w, _tiorw) \
{ \
[RZ_MTU3_TIER] = _tier, \
[RZ_MTU3_NFCR] = _nfcr, \
[RZ_MTU3_TSTR] = _tstr, \
[RZ_MTU3_TCNTCMPCLR] = _tcntcmpclr, \
[RZ_MTU3_TCRU] = _tcru, \
[RZ_MTU3_TCR2U] = _tcr2u, \
[RZ_MTU3_TIORU] = _tioru, \
[RZ_MTU3_TCRV] = _tcrv, \
[RZ_MTU3_TCR2V] = _tcr2v, \
[RZ_MTU3_TIORV] = _tiorv, \
[RZ_MTU3_TCRW] = _tcrw, \
[RZ_MTU3_TCR2W] = _tcr2w, \
[RZ_MTU3_TIORW] = _tiorw \
} \
#define MTU_8BIT_CH_8(_tier, _nfcr, _tcr, _tcr2, _tmdr1, _tiorh, _tiorl) \
{ \
[RZ_MTU3_TIER] = _tier, \
[RZ_MTU3_NFCR] = _nfcr, \
[RZ_MTU3_TCR] = _tcr, \
[RZ_MTU3_TCR2] = _tcr2, \
[RZ_MTU3_TMDR1] = _tmdr1, \
[RZ_MTU3_TIORH] = _tiorh, \
[RZ_MTU3_TIORL] = _tiorl \
} \
#define MTU_16BIT_CH_0(_tcnt, _tgra, _tgrb, _tgrc, _tgrd, _tgre, _tgrf) \
{ \
[RZ_MTU3_TCNT] = _tcnt, \
[RZ_MTU3_TGRA] = _tgra, \
[RZ_MTU3_TGRB] = _tgrb, \
[RZ_MTU3_TGRC] = _tgrc, \
[RZ_MTU3_TGRD] = _tgrd, \
[RZ_MTU3_TGRE] = _tgre, \
[RZ_MTU3_TGRF] = _tgrf \
}
#define MTU_16BIT_CH_1_2(_tcnt, _tgra, _tgrb) \
{ \
[RZ_MTU3_TCNT] = _tcnt, \
[RZ_MTU3_TGRA] = _tgra, \
[RZ_MTU3_TGRB] = _tgrb \
}
#define MTU_16BIT_CH_3_6(_tcnt, _tgra, _tgrb, _tgrc, _tgrd, _tgre) \
{ \
[RZ_MTU3_TCNT] = _tcnt, \
[RZ_MTU3_TGRA] = _tgra, \
[RZ_MTU3_TGRB] = _tgrb, \
[RZ_MTU3_TGRC] = _tgrc, \
[RZ_MTU3_TGRD] = _tgrd, \
[RZ_MTU3_TGRE] = _tgre \
}
#define MTU_16BIT_CH_4_7(_tcnt, _tgra, _tgrb, _tgrc, _tgrd, _tgre, _tgrf, \
_tadcr, _tadcora, _tadcorb, _tadcobra, _tadcobrb) \
{ \
[RZ_MTU3_TCNT] = _tcnt, \
[RZ_MTU3_TGRA] = _tgra, \
[RZ_MTU3_TGRB] = _tgrb, \
[RZ_MTU3_TGRC] = _tgrc, \
[RZ_MTU3_TGRD] = _tgrd, \
[RZ_MTU3_TGRE] = _tgre, \
[RZ_MTU3_TGRF] = _tgrf, \
[RZ_MTU3_TADCR] = _tadcr, \
[RZ_MTU3_TADCORA] = _tadcora, \
[RZ_MTU3_TADCORB] = _tadcorb, \
[RZ_MTU3_TADCOBRA] = _tadcobra, \
[RZ_MTU3_TADCOBRB] = _tadcobrb \
}
#define MTU_16BIT_CH_5(_tcntu, _tgru, _tcntv, _tgrv, _tcntw, _tgrw) \
{ \
[RZ_MTU3_TCNTU] = _tcntu, \
[RZ_MTU3_TGRU] = _tgru, \
[RZ_MTU3_TCNTV] = _tcntv, \
[RZ_MTU3_TGRV] = _tgrv, \
[RZ_MTU3_TCNTW] = _tcntw, \
[RZ_MTU3_TGRW] = _tgrw \
}
#define MTU_32BIT_CH_1(_tcntlw, _tgralw, _tgrblw) \
{ \
[RZ_MTU3_TCNTLW] = _tcntlw, \
[RZ_MTU3_TGRALW] = _tgralw, \
[RZ_MTU3_TGRBLW] = _tgrblw \
}
#define MTU_32BIT_CH_8(_tcnt, _tgra, _tgrb, _tgrc, _tgrd) \
{ \
[RZ_MTU3_TCNT] = _tcnt, \
[RZ_MTU3_TGRA] = _tgra, \
[RZ_MTU3_TGRB] = _tgrb, \
[RZ_MTU3_TGRC] = _tgrc, \
[RZ_MTU3_TGRD] = _tgrd \
}
#endif
drivers/mfd/sec-core.c
View file @ 3af49062
......@@ -24,22 +24,9 @@
#include <linux/mfd/samsung/s2mps14.h>
#include <linux/mfd/samsung/s2mps15.h>
#include <linux/mfd/samsung/s2mpu02.h>
#include <linux/mfd/samsung/s5m8763.h>
#include <linux/mfd/samsung/s5m8767.h>
#include <linux/regmap.h>
static const struct mfd_cell s5m8751_devs[] = {
{ .name = "s5m8751-pmic", },
{ .name = "s5m-charger", },
{ .name = "s5m8751-codec", },
};
static const struct mfd_cell s5m8763_devs[] = {
{ .name = "s5m8763-pmic", },
{ .name = "s5m-rtc", },
{ .name = "s5m-charger", },
};
static const struct mfd_cell s5m8767_devs[] = {
{ .name = "s5m8767-pmic", },
{ .name = "s5m-rtc", },
......@@ -158,19 +145,6 @@ static bool s2mpu02_volatile(struct device *dev, unsigned int reg)
}
}
static bool s5m8763_volatile(struct device *dev, unsigned int reg)
{
switch (reg) {
case S5M8763_REG_IRQM1:
case S5M8763_REG_IRQM2:
case S5M8763_REG_IRQM3:
case S5M8763_REG_IRQM4:
return false;
default:
return true;
}
}
static const struct regmap_config sec_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
......@@ -230,15 +204,6 @@ static const struct regmap_config s2mpu02_regmap_config = {
.cache_type = REGCACHE_FLAT,
};
static const struct regmap_config s5m8763_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = S5M8763_REG_LBCNFG2,
.volatile_reg = s5m8763_volatile,
.cache_type = REGCACHE_FLAT,
};
static const struct regmap_config s5m8767_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
......@@ -348,9 +313,6 @@ static int sec_pmic_probe(struct i2c_client *i2c)
case S2MPS15X:
regmap = &s2mps15_regmap_config;
break;
case S5M8763X:
regmap = &s5m8763_regmap_config;
break;
case S5M8767X:
regmap = &s5m8767_regmap_config;
break;
......@@ -375,14 +337,6 @@ static int sec_pmic_probe(struct i2c_client *i2c)
pm_runtime_set_active(sec_pmic->dev);
switch (sec_pmic->device_type) {
case S5M8751X:
sec_devs = s5m8751_devs;
num_sec_devs = ARRAY_SIZE(s5m8751_devs);
break;
case S5M8763X:
sec_devs = s5m8763_devs;
num_sec_devs = ARRAY_SIZE(s5m8763_devs);
break;
case S5M8767X:
sec_devs = s5m8767_devs;
num_sec_devs = ARRAY_SIZE(s5m8767_devs);
......
drivers/mfd/sec-irq.c
View file @ 3af49062
......@@ -14,7 +14,6 @@
#include <linux/mfd/samsung/s2mps11.h>
#include <linux/mfd/samsung/s2mps14.h>
#include <linux/mfd/samsung/s2mpu02.h>
#include <linux/mfd/samsung/s5m8763.h>
#include <linux/mfd/samsung/s5m8767.h>
static const struct regmap_irq s2mps11_irqs[] = {
......@@ -297,81 +296,6 @@ static const struct regmap_irq s5m8767_irqs[] = {
},
};
static const struct regmap_irq s5m8763_irqs[] = {
[S5M8763_IRQ_DCINF] = {
.reg_offset = 0,
.mask = S5M8763_IRQ_DCINF_MASK,
},
[S5M8763_IRQ_DCINR] = {
.reg_offset = 0,
.mask = S5M8763_IRQ_DCINR_MASK,
},
[S5M8763_IRQ_JIGF] = {
.reg_offset = 0,
.mask = S5M8763_IRQ_JIGF_MASK,
},
[S5M8763_IRQ_JIGR] = {
.reg_offset = 0,
.mask = S5M8763_IRQ_JIGR_MASK,
},
[S5M8763_IRQ_PWRONF] = {
.reg_offset = 0,
.mask = S5M8763_IRQ_PWRONF_MASK,
},
[S5M8763_IRQ_PWRONR] = {
.reg_offset = 0,
.mask = S5M8763_IRQ_PWRONR_MASK,
},
[S5M8763_IRQ_WTSREVNT] = {
.reg_offset = 1,
.mask = S5M8763_IRQ_WTSREVNT_MASK,
},
[S5M8763_IRQ_SMPLEVNT] = {
.reg_offset = 1,
.mask = S5M8763_IRQ_SMPLEVNT_MASK,
},
[S5M8763_IRQ_ALARM1] = {
.reg_offset = 1,
.mask = S5M8763_IRQ_ALARM1_MASK,
},
[S5M8763_IRQ_ALARM0] = {
.reg_offset = 1,
.mask = S5M8763_IRQ_ALARM0_MASK,
},
[S5M8763_IRQ_ONKEY1S] = {
.reg_offset = 2,
.mask = S5M8763_IRQ_ONKEY1S_MASK,
},
[S5M8763_IRQ_TOPOFFR] = {
.reg_offset = 2,
.mask = S5M8763_IRQ_TOPOFFR_MASK,
},
[S5M8763_IRQ_DCINOVPR] = {
.reg_offset = 2,
.mask = S5M8763_IRQ_DCINOVPR_MASK,
},
[S5M8763_IRQ_CHGRSTF] = {
.reg_offset = 2,
.mask = S5M8763_IRQ_CHGRSTF_MASK,
},
[S5M8763_IRQ_DONER] = {
.reg_offset = 2,
.mask = S5M8763_IRQ_DONER_MASK,
},
[S5M8763_IRQ_CHGFAULT] = {
.reg_offset = 2,
.mask = S5M8763_IRQ_CHGFAULT_MASK,
},
[S5M8763_IRQ_LOBAT1] = {
.reg_offset = 3,
.mask = S5M8763_IRQ_LOBAT1_MASK,
},
[S5M8763_IRQ_LOBAT2] = {
.reg_offset = 3,
.mask = S5M8763_IRQ_LOBAT2_MASK,
},
};
static const struct regmap_irq_chip s2mps11_irq_chip = {
.name = "s2mps11",
.irqs = s2mps11_irqs,
......@@ -425,16 +349,6 @@ static const struct regmap_irq_chip s5m8767_irq_chip = {
.ack_base = S5M8767_REG_INT1,
};
static const struct regmap_irq_chip s5m8763_irq_chip = {
.name = "s5m8763",
.irqs = s5m8763_irqs,
.num_irqs = ARRAY_SIZE(s5m8763_irqs),
.num_regs = 4,
.status_base = S5M8763_REG_IRQ1,
.mask_base = S5M8763_REG_IRQM1,
.ack_base = S5M8763_REG_IRQ1,
};
int sec_irq_init(struct sec_pmic_dev *sec_pmic)
{
int ret = 0;
......@@ -448,9 +362,6 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic)
}
switch (type) {
case S5M8763X:
sec_irq_chip = &s5m8763_irq_chip;
break;
case S5M8767X:
sec_irq_chip = &s5m8767_irq_chip;
break;
......
drivers/mfd/si476x-cmd.c
View file @ 3af49062
......@@ -251,7 +251,7 @@ static int si476x_core_parse_and_nag_about_error(struct si476x_core *core)
* @usecs: amount of time to wait before reading the response (in
* usecs)
*
* Function returns 0 on succsess and negative error code on
* Function returns 0 on success and negative error code on
* failure
*/
static int si476x_core_send_command(struct si476x_core *core,
......@@ -398,7 +398,7 @@ static int si476x_cmd_tune_seek_freq(struct si476x_core *core,
* The command requests the firmware and patch version for currently
* loaded firmware (dependent on the function of the device FM/AM/WB)
*
* Function returns 0 on succsess and negative error code on
* Function returns 0 on success and negative error code on
* failure
*/
int si476x_core_cmd_func_info(struct si476x_core *core,
......@@ -429,7 +429,7 @@ EXPORT_SYMBOL_GPL(si476x_core_cmd_func_info);
* @property: property address
* @value: property value
*
* Function returns 0 on succsess and negative error code on
* Function returns 0 on success and negative error code on
* failure
*/
int si476x_core_cmd_set_property(struct si476x_core *core,
......@@ -545,13 +545,13 @@ EXPORT_SYMBOL_GPL(si476x_core_cmd_dig_audio_pin_cfg);
* SI476X_IQCLK_NOOP - do not modify the behaviour
* SI476X_IQCLK_TRISTATE - put the pin in tristate condition,
* enable 1MOhm pulldown
* SI476X_IQCLK_IQ - set pin to be a part of I/Q interace
* SI476X_IQCLK_IQ - set pin to be a part of I/Q interface
* in master mode
* @iqfs: - IQFS pin function configuration:
* SI476X_IQFS_NOOP - do not modify the behaviour
* SI476X_IQFS_TRISTATE - put the pin in tristate condition,
* enable 1MOhm pulldown
* SI476X_IQFS_IQ - set pin to be a part of I/Q interace
* SI476X_IQFS_IQ - set pin to be a part of I/Q interface
* in master mode
* @iout: - IOUT pin function configuration:
* SI476X_IOUT_NOOP - do not modify the behaviour
......@@ -589,7 +589,7 @@ EXPORT_SYMBOL_GPL(si476x_core_cmd_zif_pin_cfg);
/**
* si476x_core_cmd_ic_link_gpo_ctl_pin_cfg - send
* 'IC_LINK_GPIO_CTL_PIN_CFG' comand to the device
* 'IC_LINK_GPIO_CTL_PIN_CFG' command to the device
* @core: - device to send the command to
* @icin: - ICIN pin function configuration:
* SI476X_ICIN_NOOP - do not modify the behaviour
......@@ -1014,7 +1014,7 @@ EXPORT_SYMBOL_GPL(si476x_core_cmd_fm_phase_diversity);
* NOTE caller must hold core lock
*
* Function returns the value of the status bit in case of success and
* negative error code in case of failre.
* negative error code in case of failure.
*/
int si476x_core_cmd_fm_phase_div_status(struct si476x_core *core)
{
......
drivers/mfd/simple-mfd-i2c.c
View file @ 3af49062
......@@ -72,9 +72,22 @@ static const struct simple_mfd_data silergy_sy7636a = {
.mfd_cell_size = ARRAY_SIZE(sy7636a_cells),
};
static const struct mfd_cell max597x_cells[] = {
{ .name = "max597x-regulator", },
{ .name = "max597x-iio", },
{ .name = "max597x-led", },
};
static const struct simple_mfd_data maxim_max597x = {
.mfd_cell = max597x_cells,
.mfd_cell_size = ARRAY_SIZE(max597x_cells),
};
static const struct of_device_id simple_mfd_i2c_of_match[] = {
{ .compatible = "kontron,sl28cpld" },
{ .compatible = "silergy,sy7636a", .data = &silergy_sy7636a},
{ .compatible = "maxim,max5970", .data = &maxim_max597x},
{ .compatible = "maxim,max5978", .data = &maxim_max597x},
{}
};
MODULE_DEVICE_TABLE(of, simple_mfd_i2c_of_match);
......
drivers/mfd/ssbi.c
View file @ 3af49062
......@@ -262,7 +262,6 @@ EXPORT_SYMBOL_GPL(ssbi_write);
static int ssbi_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct resource *mem_res;
struct ssbi *ssbi;
const char *type;
......@@ -270,8 +269,7 @@ static int ssbi_probe(struct platform_device *pdev)
if (!ssbi)
return -ENOMEM;
mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
ssbi->base = devm_ioremap_resource(&pdev->dev, mem_res);
ssbi->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
if (IS_ERR(ssbi->base))
return PTR_ERR(ssbi->base);
......
drivers/mfd/stmpe-i2c.c
View file @ 3af49062
......@@ -135,6 +135,5 @@ static void __exit stmpe_exit(void)
}
module_exit(stmpe_exit);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("STMPE MFD I2C Interface Driver");
MODULE_AUTHOR("Rabin Vincent <rabin.vincent@stericsson.com>");
drivers/mfd/stmpe-spi.c
View file @ 3af49062
......@@ -154,6 +154,5 @@ static void __exit stmpe_exit(void)
}
module_exit(stmpe_exit);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("STMPE MFD SPI Interface Driver");
MODULE_AUTHOR("Viresh Kumar <vireshk@kernel.org>");
drivers/mfd/stmpe.c
View file @ 3af49062
......@@ -1378,7 +1378,7 @@ int stmpe_probe(struct stmpe_client_info *ci, enum stmpe_partnum partnum)
stmpe_of_probe(pdata, np);
if (of_find_property(np, "interrupts", NULL) == NULL)
if (!of_property_present(np, "interrupts"))
ci->irq = -1;
stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL);
......
drivers/mfd/sun4i-gpadc.c
View file @ 3af49062
......@@ -93,7 +93,6 @@ MODULE_DEVICE_TABLE(of, sun4i_gpadc_of_match);
static int sun4i_gpadc_probe(struct platform_device *pdev)
{
struct sun4i_gpadc_dev *dev;
struct resource *mem;
const struct of_device_id *of_id;
const struct mfd_cell *cells;
unsigned int irq, size;
......@@ -124,8 +123,7 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
if (!dev)
return -ENOMEM;
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
dev->base = devm_ioremap_resource(&pdev->dev, mem);
dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
if (IS_ERR(dev->base))
return PTR_ERR(dev->base);
......
drivers/mfd/tc3589x.c
View file @ 3af49062
......@@ -502,6 +502,5 @@ static void __exit tc3589x_exit(void)
}
module_exit(tc3589x_exit);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("TC3589x MFD core driver");
MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent");
drivers/mfd/tps6586x.c
View file @ 3af49062
......@@ -638,4 +638,3 @@ module_exit(tps6586x_exit);
MODULE_DESCRIPTION("TPS6586X core driver");
MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
MODULE_LICENSE("GPL");
drivers/mfd/tqmx86.c
View file @ 3af49062
......@@ -16,8 +16,8 @@
#include <linux/platform_data/i2c-ocores.h>
#include <linux/platform_device.h>
#define TQMX86_IOBASE 0x160
#define TQMX86_IOSIZE 0x3f
#define TQMX86_IOBASE 0x180
#define TQMX86_IOSIZE 0x20
#define TQMX86_IOBASE_I2C 0x1a0
#define TQMX86_IOSIZE_I2C 0xa
#define TQMX86_IOBASE_WATCHDOG 0x18b
......@@ -25,14 +25,14 @@
#define TQMX86_IOBASE_GPIO 0x18d
#define TQMX86_IOSIZE_GPIO 0x4
#define TQMX86_REG_BOARD_ID 0x20
#define TQMX86_REG_BOARD_ID 0x00
#define TQMX86_REG_BOARD_ID_E38M 1
#define TQMX86_REG_BOARD_ID_50UC 2
#define TQMX86_REG_BOARD_ID_E38C 3
#define TQMX86_REG_BOARD_ID_60EB 4
#define TQMX86_REG_BOARD_ID_E39M 5
#define TQMX86_REG_BOARD_ID_E39C 6
#define TQMX86_REG_BOARD_ID_E39x 7
#define TQMX86_REG_BOARD_ID_E39MS 5
#define TQMX86_REG_BOARD_ID_E39C1 6
#define TQMX86_REG_BOARD_ID_E39C2 7
#define TQMX86_REG_BOARD_ID_70EB 8
#define TQMX86_REG_BOARD_ID_80UC 9
#define TQMX86_REG_BOARD_ID_110EB 11
......@@ -40,18 +40,18 @@
#define TQMX86_REG_BOARD_ID_E40S 13
#define TQMX86_REG_BOARD_ID_E40C1 14
#define TQMX86_REG_BOARD_ID_E40C2 15
#define TQMX86_REG_BOARD_REV 0x21
#define TQMX86_REG_IO_EXT_INT 0x26
#define TQMX86_REG_BOARD_REV 0x01
#define TQMX86_REG_IO_EXT_INT 0x06
#define TQMX86_REG_IO_EXT_INT_NONE 0
#define TQMX86_REG_IO_EXT_INT_7 1
#define TQMX86_REG_IO_EXT_INT_9 2
#define TQMX86_REG_IO_EXT_INT_12 3
#define TQMX86_REG_IO_EXT_INT_MASK 0x3
#define TQMX86_REG_IO_EXT_INT_GPIO_SHIFT 4
#define TQMX86_REG_SAUC 0x17
#define TQMX86_REG_I2C_DETECT 0x47
#define TQMX86_REG_I2C_DETECT 0x1a7
#define TQMX86_REG_I2C_DETECT_SOFT 0xa5
#define TQMX86_REG_I2C_INT_EN 0x49
static uint gpio_irq;
module_param(gpio_irq, uint, 0);
......@@ -111,7 +111,7 @@ static const struct mfd_cell tqmx86_devs[] = {
},
};
static const char *tqmx86_board_id_to_name(u8 board_id)
static const char *tqmx86_board_id_to_name(u8 board_id, u8 sauc)
{
switch (board_id) {
case TQMX86_REG_BOARD_ID_E38M:
......@@ -122,12 +122,12 @@ static const char *tqmx86_board_id_to_name(u8 board_id)
return "TQMxE38C";
case TQMX86_REG_BOARD_ID_60EB:
return "TQMx60EB";
case TQMX86_REG_BOARD_ID_E39M:
return "TQMxE39M";
case TQMX86_REG_BOARD_ID_E39C:
return "TQMxE39C";
case TQMX86_REG_BOARD_ID_E39x:
return "TQMxE39x";
case TQMX86_REG_BOARD_ID_E39MS:
return (sauc == 0xff) ? "TQMxE39M" : "TQMxE39S";
case TQMX86_REG_BOARD_ID_E39C1:
return "TQMxE39C1";
case TQMX86_REG_BOARD_ID_E39C2:
return "TQMxE39C2";
case TQMX86_REG_BOARD_ID_70EB:
return "TQMx70EB";
case TQMX86_REG_BOARD_ID_80UC:
......@@ -160,9 +160,9 @@ static int tqmx86_board_id_to_clk_rate(struct device *dev, u8 board_id)
case TQMX86_REG_BOARD_ID_E40C1:
case TQMX86_REG_BOARD_ID_E40C2:
return 24000;
case TQMX86_REG_BOARD_ID_E39M:
case TQMX86_REG_BOARD_ID_E39C:
case TQMX86_REG_BOARD_ID_E39x:
case TQMX86_REG_BOARD_ID_E39MS:
case TQMX86_REG_BOARD_ID_E39C1:
case TQMX86_REG_BOARD_ID_E39C2:
return 25000;
case TQMX86_REG_BOARD_ID_E38M:
case TQMX86_REG_BOARD_ID_E38C:
......@@ -176,7 +176,7 @@ static int tqmx86_board_id_to_clk_rate(struct device *dev, u8 board_id)
static int tqmx86_probe(struct platform_device *pdev)
{
u8 board_id, rev, i2c_det, io_ext_int_val;
u8 board_id, sauc, rev, i2c_det, io_ext_int_val;
struct device *dev = &pdev->dev;
u8 gpio_irq_cfg, readback;
const char *board_name;
......@@ -206,14 +206,20 @@ static int tqmx86_probe(struct platform_device *pdev)
return -ENOMEM;
board_id = ioread8(io_base + TQMX86_REG_BOARD_ID);
board_name = tqmx86_board_id_to_name(board_id);
sauc = ioread8(io_base + TQMX86_REG_SAUC);
board_name = tqmx86_board_id_to_name(board_id, sauc);
rev = ioread8(io_base + TQMX86_REG_BOARD_REV);
dev_info(dev,
"Found %s - Board ID %d, PCB Revision %d, PLD Revision %d\n",
board_name, board_id, rev >> 4, rev & 0xf);
i2c_det = ioread8(io_base + TQMX86_REG_I2C_DETECT);
/*
* The I2C_DETECT register is in the range assigned to the I2C driver
* later, so we don't extend TQMX86_IOSIZE. Use inb() for this one-off
* access instead of ioport_map + unmap.
*/
i2c_det = inb(TQMX86_REG_I2C_DETECT);
if (gpio_irq_cfg) {
io_ext_int_val =
......
drivers/mfd/twl-core.c
View file @ 3af49062
......@@ -594,71 +594,6 @@ int twl_get_hfclk_rate(void)
}
EXPORT_SYMBOL_GPL(twl_get_hfclk_rate);
static struct device *
add_numbered_child(unsigned mod_no, const char *name, int num,
void *pdata, unsigned pdata_len,
bool can_wakeup, int irq0, int irq1)
{
struct platform_device *pdev;
struct twl_client *twl;
int status, sid;
if (unlikely(mod_no >= twl_get_last_module())) {
pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
return ERR_PTR(-EPERM);
}
sid = twl_priv->twl_map[mod_no].sid;
twl = &twl_priv->twl_modules[sid];
pdev = platform_device_alloc(name, num);
if (!pdev)
return ERR_PTR(-ENOMEM);
pdev->dev.parent = &twl->client->dev;
if (pdata) {
status = platform_device_add_data(pdev, pdata, pdata_len);
if (status < 0) {
dev_dbg(&pdev->dev, "can't add platform_data\n");
goto put_device;
}
}
if (irq0) {
struct resource r[2] = {
{ .start = irq0, .flags = IORESOURCE_IRQ, },
{ .start = irq1, .flags = IORESOURCE_IRQ, },
};
status = platform_device_add_resources(pdev, r, irq1 ? 2 : 1);
if (status < 0) {
dev_dbg(&pdev->dev, "can't add irqs\n");
goto put_device;
}
}
status = platform_device_add(pdev);
if (status)
goto put_device;
device_init_wakeup(&pdev->dev, can_wakeup);
return &pdev->dev;
put_device:
platform_device_put(pdev);
dev_err(&twl->client->dev, "failed to add device %s\n", name);
return ERR_PTR(status);
}
static inline struct device *add_child(unsigned mod_no, const char *name,
void *pdata, unsigned pdata_len,
bool can_wakeup, int irq0, int irq1)
{
return add_numbered_child(mod_no, name, -1, pdata, pdata_len,
can_wakeup, irq0, irq1);
}
/*----------------------------------------------------------------------*/
/*
......
drivers/mfd/twl4030-audio.c
View file @ 3af49062
......@@ -285,5 +285,4 @@ module_platform_driver(twl4030_audio_driver);
MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
MODULE_DESCRIPTION("TWL4030 audio block MFD driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:twl4030-audio");
drivers/mfd/twl6040.c
View file @ 3af49062
......@@ -839,4 +839,3 @@ module_i2c_driver(twl6040_driver);
MODULE_DESCRIPTION("TWL6040 MFD");
MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
MODULE_LICENSE("GPL");
drivers/mfd/wm8994-core.c
View file @ 3af49062
......@@ -279,20 +279,11 @@ static int wm8994_set_pdata_from_of(struct wm8994 *wm8994)
of_property_read_u32_array(np, "wlf,micbias-cfg", pdata->micbias,
ARRAY_SIZE(pdata->micbias));
pdata->lineout1_diff = true;
pdata->lineout2_diff = true;
if (of_find_property(np, "wlf,lineout1-se", NULL))
pdata->lineout1_diff = false;
if (of_find_property(np, "wlf,lineout2-se", NULL))
pdata->lineout2_diff = false;
if (of_find_property(np, "wlf,lineout1-feedback", NULL))
pdata->lineout1fb = true;
if (of_find_property(np, "wlf,lineout2-feedback", NULL))
pdata->lineout2fb = true;
if (of_find_property(np, "wlf,ldoena-always-driven", NULL))
pdata->lineout2fb = true;
pdata->lineout1_diff = !of_property_read_bool(np, "wlf,lineout1-se");
pdata->lineout2_diff = !of_property_read_bool(np, "wlf,lineout2-se");
pdata->lineout1fb = of_property_read_bool(np, "wlf,lineout1-feedback");
pdata->lineout2fb = of_property_read_bool(np, "wlf,lineout2-feedback") ||
of_property_read_bool(np, "wlf,ldoena-always-driven");
pdata->spkmode_pu = of_property_read_bool(np, "wlf,spkmode-pu");
......
drivers/rtc/rtc-s5m.c
View file @ 3af49062
......@@ -85,7 +85,7 @@ struct s5m_rtc_reg_config {
unsigned int write_alarm_udr_mask;
};
/* Register map for S5M8763 and S5M8767 */
/* Register map for S5M8767 */
static const struct s5m_rtc_reg_config s5m_rtc_regs = {
.regs_count = 8,
.time = S5M_RTC_SEC,
......@@ -236,7 +236,6 @@ static int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info,
switch (info->device_type) {
case S5M8767X:
case S5M8763X:
ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val);
val &= S5M_ALARM0_STATUS;
break;
......@@ -299,7 +298,6 @@ static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
data |= info->regs->write_alarm_udr_mask;
switch (info->device_type) {
case S5M8763X:
case S5M8767X:
data &= ~S5M_RTC_TIME_EN_MASK;
break;
......@@ -329,38 +327,6 @@ static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
return ret;
}
static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm)
{
tm->tm_sec = bcd2bin(data[RTC_SEC]);
tm->tm_min = bcd2bin(data[RTC_MIN]);
if (data[RTC_HOUR] & HOUR_12) {
tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f);
if (data[RTC_HOUR] & HOUR_PM)
tm->tm_hour += 12;
} else {
tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f);
}
tm->tm_wday = data[RTC_WEEKDAY] & 0x07;
tm->tm_mday = bcd2bin(data[RTC_DATE]);
tm->tm_mon = bcd2bin(data[RTC_MONTH]);
tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100;
tm->tm_year -= 1900;
}
static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data)
{
data[RTC_SEC] = bin2bcd(tm->tm_sec);
data[RTC_MIN] = bin2bcd(tm->tm_min);
data[RTC_HOUR] = bin2bcd(tm->tm_hour);
data[RTC_WEEKDAY] = tm->tm_wday;
data[RTC_DATE] = bin2bcd(tm->tm_mday);
data[RTC_MONTH] = bin2bcd(tm->tm_mon);
data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100);
data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100);
}
static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
struct s5m_rtc_info *info = dev_get_drvdata(dev);
......@@ -385,10 +351,6 @@ static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
return ret;
switch (info->device_type) {
case S5M8763X:
s5m8763_data_to_tm(data, tm);
break;
case S5M8767X:
case S2MPS15X:
case S2MPS14X:
......@@ -412,9 +374,6 @@ static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
int ret = 0;
switch (info->device_type) {
case S5M8763X:
s5m8763_tm_to_data(tm, data);
break;
case S5M8767X:
case S2MPS15X:
case S2MPS14X:
......@@ -444,7 +403,6 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
struct s5m_rtc_info *info = dev_get_drvdata(dev);
u8 data[RTC_MAX_NUM_TIME_REGS];
unsigned int val;
int ret, i;
ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
......@@ -453,15 +411,6 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
return ret;
switch (info->device_type) {
case S5M8763X:
s5m8763_data_to_tm(data, &alrm->time);
ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val);
if (ret < 0)
return ret;
alrm->enabled = !!val;
break;
case S5M8767X:
case S2MPS15X:
case S2MPS14X:
......@@ -500,10 +449,6 @@ static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
dev_dbg(info->dev, "%s: %ptR(%d)\n", __func__, &tm, tm.tm_wday);
switch (info->device_type) {
case S5M8763X:
ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0);
break;
case S5M8767X:
case S2MPS15X:
case S2MPS14X:
......@@ -531,7 +476,6 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
{
int ret;
u8 data[RTC_MAX_NUM_TIME_REGS];
u8 alarm0_conf;
struct rtc_time tm;
ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
......@@ -543,11 +487,6 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
dev_dbg(info->dev, "%s: %ptR(%d)\n", __func__, &tm, tm.tm_wday);
switch (info->device_type) {
case S5M8763X:
alarm0_conf = 0x77;
ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf);
break;
case S5M8767X:
case S2MPS15X:
case S2MPS14X:
......@@ -585,10 +524,6 @@ static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
int ret;
switch (info->device_type) {
case S5M8763X:
s5m8763_tm_to_data(&alrm->time, data);
break;
case S5M8767X:
case S2MPS15X:
case S2MPS14X:
......@@ -655,7 +590,6 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
int ret;
switch (info->device_type) {
case S5M8763X:
case S5M8767X:
/* UDR update time. Default of 7.32 ms is too long. */
ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON,
......@@ -729,11 +663,6 @@ static int s5m_rtc_probe(struct platform_device *pdev)
info->regs = &s2mps13_rtc_regs;
alarm_irq = S2MPS14_IRQ_RTCA0;
break;
case S5M8763X:
regmap_cfg = &s5m_rtc_regmap_config;
info->regs = &s5m_rtc_regs;
alarm_irq = S5M8763_IRQ_ALARM0;
break;
case S5M8767X:
regmap_cfg = &s5m_rtc_regmap_config;
info->regs = &s5m_rtc_regs;
......@@ -786,13 +715,8 @@ static int s5m_rtc_probe(struct platform_device *pdev)
info->rtc_dev->ops = &s5m_rtc_ops;
if (info->device_type == S5M8763X) {
info->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_0000;
info->rtc_dev->range_max = RTC_TIMESTAMP_END_9999;
} else {
info->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_2000;
info->rtc_dev->range_max = RTC_TIMESTAMP_END_2099;
}
info->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_2000;
info->rtc_dev->range_max = RTC_TIMESTAMP_END_2099;
if (!info->irq) {
clear_bit(RTC_FEATURE_ALARM, info->rtc_dev->features);
......
include/dt-bindings/mfd/stm32f4-rcc.h
View file @ 3af49062
......@@ -34,7 +34,6 @@
#define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8))
#define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit)
/* AHB2 */
#define STM32F4_RCC_AHB2_DCMI 0
#define STM32F4_RCC_AHB2_CRYP 4
......
include/linux/mfd/axp20x.h
View file @ 3af49062
......@@ -21,6 +21,7 @@ enum axp20x_variants {
AXP806_ID,
AXP809_ID,
AXP813_ID,
AXP15060_ID,
NR_AXP20X_VARIANTS,
};
......@@ -131,6 +132,39 @@ enum axp20x_variants {
/* Other DCDC regulator control registers are the same as AXP803 */
#define AXP813_DCDC7_V_OUT 0x26
#define AXP15060_STARTUP_SRC 0x00
#define AXP15060_PWR_OUT_CTRL1 0x10
#define AXP15060_PWR_OUT_CTRL2 0x11
#define AXP15060_PWR_OUT_CTRL3 0x12
#define AXP15060_DCDC1_V_CTRL 0x13
#define AXP15060_DCDC2_V_CTRL 0x14
#define AXP15060_DCDC3_V_CTRL 0x15
#define AXP15060_DCDC4_V_CTRL 0x16
#define AXP15060_DCDC5_V_CTRL 0x17
#define AXP15060_DCDC6_V_CTRL 0x18
#define AXP15060_ALDO1_V_CTRL 0x19
#define AXP15060_DCDC_MODE_CTRL1 0x1a
#define AXP15060_DCDC_MODE_CTRL2 0x1b
#define AXP15060_OUTPUT_MONITOR_DISCHARGE 0x1e
#define AXP15060_IRQ_PWROK_VOFF 0x1f
#define AXP15060_ALDO2_V_CTRL 0x20
#define AXP15060_ALDO3_V_CTRL 0x21
#define AXP15060_ALDO4_V_CTRL 0x22
#define AXP15060_ALDO5_V_CTRL 0x23
#define AXP15060_BLDO1_V_CTRL 0x24
#define AXP15060_BLDO2_V_CTRL 0x25
#define AXP15060_BLDO3_V_CTRL 0x26
#define AXP15060_BLDO4_V_CTRL 0x27
#define AXP15060_BLDO5_V_CTRL 0x28
#define AXP15060_CLDO1_V_CTRL 0x29
#define AXP15060_CLDO2_V_CTRL 0x2a
#define AXP15060_CLDO3_V_CTRL 0x2b
#define AXP15060_CLDO4_V_CTRL 0x2d
#define AXP15060_CPUSLDO_V_CTRL 0x2e
#define AXP15060_PWR_WAKEUP_CTRL 0x31
#define AXP15060_PWR_DISABLE_DOWN_SEQ 0x32
#define AXP15060_PEK_KEY 0x36
/* Interrupt */
#define AXP152_IRQ1_EN 0x40
#define AXP152_IRQ2_EN 0x41
......@@ -152,6 +186,11 @@ enum axp20x_variants {
#define AXP20X_IRQ5_STATE 0x4c
#define AXP20X_IRQ6_STATE 0x4d
#define AXP15060_IRQ1_EN 0x40
#define AXP15060_IRQ2_EN 0x41
#define AXP15060_IRQ1_STATE 0x48
#define AXP15060_IRQ2_STATE 0x49
/* ADC */
#define AXP20X_ACIN_V_ADC_H 0x56
#define AXP20X_ACIN_V_ADC_L 0x57
......@@ -222,6 +261,8 @@ enum axp20x_variants {
#define AXP22X_GPIO_STATE 0x94
#define AXP22X_GPIO_PULL_DOWN 0x95
#define AXP15060_CLDO4_GPIO2_MODESET 0x2c
/* Battery */
#define AXP20X_CHRG_CC_31_24 0xb0
#define AXP20X_CHRG_CC_23_16 0xb1
......@@ -419,6 +460,33 @@ enum {
AXP813_REG_ID_MAX,
};
enum {
AXP15060_DCDC1 = 0,
AXP15060_DCDC2,
AXP15060_DCDC3,
AXP15060_DCDC4,
AXP15060_DCDC5,
AXP15060_DCDC6,
AXP15060_ALDO1,
AXP15060_ALDO2,
AXP15060_ALDO3,
AXP15060_ALDO4,
AXP15060_ALDO5,
AXP15060_BLDO1,
AXP15060_BLDO2,
AXP15060_BLDO3,
AXP15060_BLDO4,
AXP15060_BLDO5,
AXP15060_CLDO1,
AXP15060_CLDO2,
AXP15060_CLDO3,
AXP15060_CLDO4,
AXP15060_CPUSLDO,
AXP15060_SW,
AXP15060_RTC_LDO,
AXP15060_REG_ID_MAX,
};
/* IRQs */
enum {
AXP152_IRQ_LDO0IN_CONNECT = 1,
......@@ -637,6 +705,23 @@ enum axp809_irqs {
AXP809_IRQ_GPIO0_INPUT,
};
enum axp15060_irqs {
AXP15060_IRQ_DIE_TEMP_HIGH_LV1 = 1,
AXP15060_IRQ_DIE_TEMP_HIGH_LV2,
AXP15060_IRQ_DCDC1_V_LOW,
AXP15060_IRQ_DCDC2_V_LOW,
AXP15060_IRQ_DCDC3_V_LOW,
AXP15060_IRQ_DCDC4_V_LOW,
AXP15060_IRQ_DCDC5_V_LOW,
AXP15060_IRQ_DCDC6_V_LOW,
AXP15060_IRQ_PEK_LONG,
AXP15060_IRQ_PEK_SHORT,
AXP15060_IRQ_GPIO1_INPUT,
AXP15060_IRQ_PEK_FAL_EDGE,
AXP15060_IRQ_PEK_RIS_EDGE,
AXP15060_IRQ_GPIO2_INPUT,
};
struct axp20x_dev {
struct device *dev;
int irq;
......
include/linux/mfd/core.h
View file @ 3af49062
......@@ -68,9 +68,6 @@ struct mfd_cell {
int id;
int level;
int (*enable)(struct platform_device *dev);
int (*disable)(struct platform_device *dev);
int (*suspend)(struct platform_device *dev);
int (*resume)(struct platform_device *dev);
......@@ -78,6 +75,9 @@ struct mfd_cell {
void *platform_data;
size_t pdata_size;
/* Matches ACPI */
const struct mfd_cell_acpi_match *acpi_match;
/* Software node for the device. */
const struct software_node *swnode;
......@@ -97,9 +97,6 @@ struct mfd_cell {
/* Set to 'true' to use 'of_reg' (above) - allows for of_reg=0 */
bool use_of_reg;
/* Matches ACPI */
const struct mfd_cell_acpi_match *acpi_match;
/*
* These resources can be specified relative to the parent device.
* For accessing hardware you should use resources from the platform dev
......@@ -119,19 +116,10 @@ struct mfd_cell {
/* A list of regulator supplies that should be mapped to the MFD
* device rather than the child device when requested
*/
const char * const *parent_supplies;
int num_parent_supplies;
const char * const *parent_supplies;
};
/*
* Convenience functions for clients using shared cells. Refcounting
* happens automatically, with the cell's enable/disable callbacks
* being called only when a device is first being enabled or no other
* clients are making use of it.
*/
extern int mfd_cell_enable(struct platform_device *pdev);
extern int mfd_cell_disable(struct platform_device *pdev);
/*
* Given a platform device that's been created by mfd_add_devices(), fetch
* the mfd_cell that created it.
......
include/linux/mfd/max597x.h 0 → 100644
View file @ 3af49062
This diff is collapsed.
include/linux/mfd/rsmu.h
View file @ 3af49062
......@@ -8,6 +8,9 @@
#ifndef __LINUX_MFD_RSMU_H
#define __LINUX_MFD_RSMU_H
#define RSMU_MAX_WRITE_COUNT (255)
#define RSMU_MAX_READ_COUNT (255)
/* The supported devices are ClockMatrix, Sabre and SnowLotus */
enum rsmu_type {
RSMU_CM = 0x34000,
......@@ -31,6 +34,6 @@ struct rsmu_ddata {
struct regmap *regmap;
struct mutex lock;
enum rsmu_type type;
u16 page;
u32 page;
};
#endif /* __LINUX_MFD_RSMU_H */
include/linux/mfd/rt5033-private.h
View file @ 3af49062
This diff is collapsed.
include/linux/mfd/rt5033.h
View file @ 3af49062
......@@ -49,10 +49,9 @@ struct rt5033_charger_data {
};
struct rt5033_charger {
struct device *dev;
struct rt5033_dev *rt5033;
struct power_supply psy;
struct device *dev;
struct rt5033_dev *rt5033;
struct power_supply psy;
struct rt5033_charger_data *chg;
};
......
include/linux/mfd/rz-mtu3.h 0 → 100644
View file @ 3af49062
This diff is collapsed.
include/linux/mfd/samsung/core.h
View file @ 3af49062
......@@ -36,8 +36,6 @@
struct gpio_desc;
enum sec_device_type {
S5M8751X,
S5M8763X,
S5M8767X,
S2MPA01,
S2MPS11X,
......
include/linux/mfd/samsung/irq.h
View file @ 3af49062
This diff is collapsed.
include/linux/mfd/samsung/s5m8763.h deleted 100644 → 0
View file @ c5eb8bf7
This diff is collapsed.
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