Commit 3bf84665 authored by Rob Clark's avatar Rob Clark

drm/msm/a6xx: Fix misleading comment

The range is actually len+1.
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarAkhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/545099/
parent 90b593ce
...@@ -39,8 +39,8 @@ struct a6xx_gpu { ...@@ -39,8 +39,8 @@ struct a6xx_gpu {
/* /*
* Given a register and a count, return a value to program into * Given a register and a count, return a value to program into
* REG_CP_PROTECT_REG(n) - this will block both reads and writes for _len * REG_CP_PROTECT_REG(n) - this will block both reads and writes for
* registers starting at _reg. * _len + 1 registers starting at _reg.
*/ */
#define A6XX_PROTECT_NORDWR(_reg, _len) \ #define A6XX_PROTECT_NORDWR(_reg, _len) \
((1 << 31) | \ ((1 << 31) | \
......
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