Commit 3c4af3ab authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson

dt-bindings: clock: qcom,spmi-clkdiv: convert to DT schema

Convert Qualcomm SPMI PMIC clock divider bindings to DT schema.
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223111835.37610-1-krzysztof.kozlowski@linaro.org
parent a622c1dc
Qualcomm Technologies, Inc. SPMI PMIC clock divider (clkdiv)
clkdiv configures the clock frequency of a set of outputs on the PMIC.
These clocks are typically wired through alternate functions on
gpio pins.
=======================
Properties
=======================
- compatible
Usage: required
Value type: <string>
Definition: must be "qcom,spmi-clkdiv".
- reg
Usage: required
Value type: <prop-encoded-array>
Definition: base address of CLKDIV peripherals.
- qcom,num-clkdivs
Usage: required
Value type: <u32>
Definition: number of CLKDIV peripherals.
- clocks:
Usage: required
Value type: <prop-encoded-array>
Definition: reference to the xo clock.
- clock-names:
Usage: required
Value type: <stringlist>
Definition: must be "xo".
- #clock-cells:
Usage: required
Value type: <u32>
Definition: shall contain 1.
=======
Example
=======
pm8998_clk_divs: clock-controller@5b00 {
compatible = "qcom,spmi-clkdiv";
reg = <0x5b00>;
#clock-cells = <1>;
qcom,num-clkdivs = <3>;
clocks = <&xo_board>;
clock-names = "xo";
assigned-clocks = <&pm8998_clk_divs 1>,
<&pm8998_clk_divs 2>,
<&pm8998_clk_divs 3>;
assigned-clock-rates = <9600000>,
<9600000>,
<9600000>;
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,spmi-clkdiv.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SPMI PMIC clock divider
maintainers:
- Bjorn Andersson <andersson@kernel.org>
- Stephen Boyd <sboyd@kernel.org>
description: |
Qualcomm SPMI PMIC clock divider configures the clock frequency of a set of
outputs on the PMIC. These clocks are typically wired through alternate
functions on GPIO pins.
properties:
compatible:
const: qcom,spmi-clkdiv
reg:
maxItems: 1
clocks:
items:
- description: Board XO source
clock-names:
items:
- const: xo
"#clock-cells":
const: 1
qcom,num-clkdivs:
$ref: /schemas/types.yaml#/definitions/uint32
description: Number of CLKDIV peripherals.
required:
- compatible
- reg
- clocks
- clock-names
- "#clock-cells"
- qcom,num-clkdivs
additionalProperties: false
examples:
- |
pmic {
#address-cells = <1>;
#size-cells = <0>;
clock-controller@5b00 {
compatible = "qcom,spmi-clkdiv";
reg = <0x5b00>;
clocks = <&xo_board>;
clock-names = "xo";
#clock-cells = <1>;
qcom,num-clkdivs = <3>;
assigned-clocks = <&pm8998_clk_divs 1>,
<&pm8998_clk_divs 2>,
<&pm8998_clk_divs 3>;
assigned-clock-rates = <9600000>,
<9600000>,
<9600000>;
};
};
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment