Commit 3c5aa4c7 authored by Bryan O'Donoghue's avatar Bryan O'Donoghue Committed by Bjorn Andersson

arm64: dts: qcom: sm8250: camss: Define ports and ports address/size cells

Define the set of possible ports, one for each CSI PHY along with the port
address and size cells @ the SoC dtsi level.
Suggested-by: default avatarKonrad Dybcio <konrad.dybcio@somainline.org>
Suggested-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: default avatarVladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117003232.589734-7-bryan.odonoghue@linaro.org
parent 64cb4a44
......@@ -3908,6 +3908,35 @@ camss: camss@ac6a000 {
"cam_hf_0_mnoc",
"cam_sf_0_mnoc",
"cam_sf_icp_mnoc";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
};
port@1 {
reg = <1>;
};
port@2 {
reg = <2>;
};
port@3 {
reg = <3>;
};
port@4 {
reg = <4>;
};
port@5 {
reg = <5>;
};
};
};
camcc: clock-controller@ad00000 {
......
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