Commit 3cb4ce00 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin

drm/i915: Convert intel_vgt_(de)balloon to uncore

More removal of implicit dev_priv from using old mmio accessors.

Furthermore these calls really operate on ggtt so it logically makes sense
if they take it as parameter.
Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190621070811.7006-1-tvrtko.ursulin@linux.intel.com
parent 12fdaf19
......@@ -2811,7 +2811,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
ggtt->pin_bias = max_t(u32, I915_GTT_PAGE_SIZE,
intel_wopcm_guc_size(&dev_priv->wopcm));
ret = intel_vgt_balloon(dev_priv);
ret = intel_vgt_balloon(ggtt);
if (ret)
return ret;
......@@ -2882,7 +2882,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv)
ggtt_release_guc_top(ggtt);
if (drm_mm_initialized(&ggtt->vm.mm)) {
intel_vgt_deballoon(dev_priv);
intel_vgt_deballoon(ggtt);
i915_address_space_fini(&ggtt->vm);
}
......
......@@ -136,17 +136,17 @@ static void vgt_deballoon_space(struct i915_ggtt *ggtt,
* This function is called to deallocate the ballooned-out graphic memory, when
* driver is unloaded or when ballooning fails.
*/
void intel_vgt_deballoon(struct drm_i915_private *dev_priv)
void intel_vgt_deballoon(struct i915_ggtt *ggtt)
{
int i;
if (!intel_vgpu_active(dev_priv))
if (!intel_vgpu_active(ggtt->vm.i915))
return;
DRM_DEBUG("VGT deballoon.\n");
for (i = 0; i < 4; i++)
vgt_deballoon_space(&dev_priv->ggtt, &bl_info.space[i]);
vgt_deballoon_space(ggtt, &bl_info.space[i]);
}
static int vgt_balloon_space(struct i915_ggtt *ggtt,
......@@ -214,22 +214,26 @@ static int vgt_balloon_space(struct i915_ggtt *ggtt,
* Returns:
* zero on success, non-zero if configuration invalid or ballooning failed
*/
int intel_vgt_balloon(struct drm_i915_private *dev_priv)
int intel_vgt_balloon(struct i915_ggtt *ggtt)
{
struct i915_ggtt *ggtt = &dev_priv->ggtt;
struct intel_uncore *uncore = &ggtt->vm.i915->uncore;
unsigned long ggtt_end = ggtt->vm.total;
unsigned long mappable_base, mappable_size, mappable_end;
unsigned long unmappable_base, unmappable_size, unmappable_end;
int ret;
if (!intel_vgpu_active(dev_priv))
if (!intel_vgpu_active(ggtt->vm.i915))
return 0;
mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base));
mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size));
unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base));
unmappable_size = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size));
mappable_base =
intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.base));
mappable_size =
intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.size));
unmappable_base =
intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.base));
unmappable_size =
intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.size));
mappable_end = mappable_base + mappable_size;
unmappable_end = unmappable_base + unmappable_size;
......
......@@ -42,7 +42,7 @@ intel_vgpu_has_huge_gtt(struct drm_i915_private *dev_priv)
return dev_priv->vgpu.caps & VGT_CAPS_HUGE_GTT;
}
int intel_vgt_balloon(struct drm_i915_private *dev_priv);
void intel_vgt_deballoon(struct drm_i915_private *dev_priv);
int intel_vgt_balloon(struct i915_ggtt *ggtt);
void intel_vgt_deballoon(struct i915_ggtt *ggtt);
#endif /* _I915_VGPU_H_ */
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