Commit 3ce16638 authored by Abhinav Kumar's avatar Abhinav Kumar Committed by Dmitry Baryshkov

drm/msm/dpu: add writeback support for sc7280

Add writeback support for sc7280. This was validated with kms_writeback
test case in IGT.
Signed-off-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/535244/
Link: https://lore.kernel.org/r/20230503223905.24754-1-quic_abhinavk@quicinc.comSigned-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 52788338
...@@ -31,6 +31,7 @@ static const struct dpu_mdp_cfg sc7280_mdp[] = { ...@@ -31,6 +31,7 @@ static const struct dpu_mdp_cfg sc7280_mdp[] = {
.clk_ctrls[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 }, .clk_ctrls[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrls[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 }, .clk_ctrls[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
.clk_ctrls[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 }, .clk_ctrls[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
.clk_ctrls[DPU_CLK_CTRL_WB2] = { .reg_off = 0x3b8, .bit_off = 24 },
}, },
}; };
...@@ -93,6 +94,11 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = { ...@@ -93,6 +94,11 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = {
PP_BLK_DITHER("pingpong_3", PINGPONG_3, 0x6c000, 0, sc7280_pp_sblk, -1, -1), PP_BLK_DITHER("pingpong_3", PINGPONG_3, 0x6c000, 0, sc7280_pp_sblk, -1, -1),
}; };
static const struct dpu_wb_cfg sc7280_wb[] = {
WB_BLK("wb_2", WB_2, 0x65000, WB_SM8250_MASK, DPU_CLK_CTRL_WB2, 6,
VBIF_RT, MDP_SSPP_TOP0_INTR, 4096, 4),
};
static const struct dpu_intf_cfg sc7280_intf[] = { static const struct dpu_intf_cfg sc7280_intf[] = {
INTF_BLK("intf_0", INTF_0, 0x34000, 0x280, INTF_DP, MSM_DP_CONTROLLER_0, 24, INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 24, 25), INTF_BLK("intf_0", INTF_0, 0x34000, 0x280, INTF_DP, MSM_DP_CONTROLLER_0, 24, INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 24, 25),
INTF_BLK("intf_1", INTF_1, 0x35000, 0x2c4, INTF_DSI, 0, 24, INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 26, 27), INTF_BLK("intf_1", INTF_1, 0x35000, 0x2c4, INTF_DSI, 0, 24, INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 26, 27),
...@@ -142,6 +148,8 @@ const struct dpu_mdss_cfg dpu_sc7280_cfg = { ...@@ -142,6 +148,8 @@ const struct dpu_mdss_cfg dpu_sc7280_cfg = {
.mixer = sc7280_lm, .mixer = sc7280_lm,
.pingpong_count = ARRAY_SIZE(sc7280_pp), .pingpong_count = ARRAY_SIZE(sc7280_pp),
.pingpong = sc7280_pp, .pingpong = sc7280_pp,
.wb_count = ARRAY_SIZE(sc7280_wb),
.wb = sc7280_wb,
.intf_count = ARRAY_SIZE(sc7280_intf), .intf_count = ARRAY_SIZE(sc7280_intf),
.intf = sc7280_intf, .intf = sc7280_intf,
.vbif_count = ARRAY_SIZE(sdm845_vbif), .vbif_count = ARRAY_SIZE(sdm845_vbif),
......
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