Commit 3d879e81 authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher

drm/amdgpu: add init support for GFX11 (v2)

Add initial support for GC version 11.  GC is
the graphics and compute block on the GPU.

v1: add initial gfx11 support (Wenhui)
v2: switch to new amdgpu_gfx_is_high_priority_compute_queue
    interface (Hawking)
v3: fix num_mec (Alex)
Signed-off-by: default avatarWenhui Sheng <Wenhui.Sheng@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 028c3fb3
...@@ -131,7 +131,8 @@ amdgpu-y += \ ...@@ -131,7 +131,8 @@ amdgpu-y += \
gfx_v9_4.o \ gfx_v9_4.o \
gfx_v9_4_2.o \ gfx_v9_4_2.o \
gfx_v10_0.o \ gfx_v10_0.o \
imu_v11_0.o imu_v11_0.o \
gfx_v11_0.o
# add async DMA block # add async DMA block
amdgpu-y += \ amdgpu-y += \
......
...@@ -57,6 +57,9 @@ struct amdgpu_mec { ...@@ -57,6 +57,9 @@ struct amdgpu_mec {
u64 hpd_eop_gpu_addr; u64 hpd_eop_gpu_addr;
struct amdgpu_bo *mec_fw_obj; struct amdgpu_bo *mec_fw_obj;
u64 mec_fw_gpu_addr; u64 mec_fw_gpu_addr;
struct amdgpu_bo *mec_fw_data_obj;
u64 mec_fw_data_gpu_addr;
u32 num_mec; u32 num_mec;
u32 num_pipe_per_mec; u32 num_pipe_per_mec;
u32 num_queue_per_pipe; u32 num_queue_per_pipe;
...@@ -245,6 +248,10 @@ struct amdgpu_pfp { ...@@ -245,6 +248,10 @@ struct amdgpu_pfp {
struct amdgpu_bo *pfp_fw_obj; struct amdgpu_bo *pfp_fw_obj;
uint64_t pfp_fw_gpu_addr; uint64_t pfp_fw_gpu_addr;
uint32_t *pfp_fw_ptr; uint32_t *pfp_fw_ptr;
struct amdgpu_bo *pfp_fw_data_obj;
uint64_t pfp_fw_data_gpu_addr;
uint32_t *pfp_fw_data_ptr;
}; };
struct amdgpu_ce { struct amdgpu_ce {
...@@ -257,6 +264,11 @@ struct amdgpu_me { ...@@ -257,6 +264,11 @@ struct amdgpu_me {
struct amdgpu_bo *me_fw_obj; struct amdgpu_bo *me_fw_obj;
uint64_t me_fw_gpu_addr; uint64_t me_fw_gpu_addr;
uint32_t *me_fw_ptr; uint32_t *me_fw_ptr;
struct amdgpu_bo *me_fw_data_obj;
uint64_t me_fw_data_gpu_addr;
uint32_t *me_fw_data_ptr;
uint32_t num_me; uint32_t num_me;
uint32_t num_pipe_per_me; uint32_t num_pipe_per_me;
uint32_t num_queue_per_pipe; uint32_t num_queue_per_pipe;
...@@ -277,6 +289,7 @@ struct amdgpu_gfx { ...@@ -277,6 +289,7 @@ struct amdgpu_gfx {
struct amdgpu_kiq kiq; struct amdgpu_kiq kiq;
struct amdgpu_imu imu; struct amdgpu_imu imu;
struct amdgpu_scratch scratch; struct amdgpu_scratch scratch;
bool rs64_enable; /* firmware format */
const struct firmware *me_fw; /* ME firmware */ const struct firmware *me_fw; /* ME firmware */
uint32_t me_fw_version; uint32_t me_fw_version;
const struct firmware *pfp_fw; /* PFP firmware */ const struct firmware *pfp_fw; /* PFP firmware */
......
This diff is collapsed.
/*
* Copyright 2021 dvanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __GFX_V11_0_H__
#define __GFX_V11_0_H__
extern const struct amdgpu_ip_block_version gfx_v11_0_ip_block;
#endif
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