Commit 3da8fdc5 authored by James Simmons's avatar James Simmons

[ATY FBDEV] Rage XL cards can now be booted with needed the BIOS :-)

[FBCON] Moving to use ring buffers and DMA cards.
parent 5405a659
......@@ -715,6 +715,12 @@ config FB_ATY_GX
is at
<http://support.ati.com/products/pc/mach64/graphics_xpression.html>.
config FB_ATY_XL_INIT
bool " Rage XL No-BIOS Init support" if FB_ATY_CT
depends on FB_ATY
help
Say Y here to support booting a Rage XL without BIOS support.
config FB_SIS
tristate "SIS acceleration"
depends on FB && PCI
......
......@@ -4,4 +4,5 @@ obj-$(CONFIG_FB_ATY128) += aty128fb.o
atyfb-y := atyfb_base.o mach64_accel.o
atyfb-$(CONFIG_FB_ATY_GX) += mach64_gx.o
atyfb-$(CONFIG_FB_ATY_CT) += mach64_ct.o mach64_cursor.o
atyfb-$(CONFIG_FB_ATY_XL_INIT) += xlinit.o
atyfb-objs := $(atyfb-y)
......@@ -36,13 +36,17 @@ struct pll_ct {
u8 pll_ref_div;
u8 pll_gen_cntl;
u8 mclk_fb_div;
u8 mclk_fb_mult; /* 2 ro 4 */
u8 sclk_fb_div;
u8 pll_vclk_cntl;
u8 vclk_post_div;
u8 vclk_fb_div;
u8 pll_ext_cntl;
u8 spll_cntl2;
u32 dsp_config; /* Mach64 GTB DSP */
u32 dsp_on_off; /* Mach64 GTB DSP */
u8 mclk_post_div_real;
u8 xclk_post_div_real;
u8 vclk_post_div_real;
};
......@@ -75,6 +79,7 @@ struct atyfb_par {
u32 ref_clk_per;
u32 pll_per;
u32 mclk_per;
u32 xclk_per;
u8 bus_type;
u8 ram_type;
u8 mem_refresh_rate;
......@@ -118,7 +123,7 @@ struct atyfb_par {
#define M64F_EXTRA_BRIGHT 0x00020000
#define M64F_LT_SLEEP 0x00040000
#define M64F_XL_DLL 0x00080000
#define M64F_MFB_TIMES_4 0x00100000
/*
* Register access
......@@ -151,6 +156,33 @@ static inline void aty_st_le32(int regindex, u32 val,
#endif
}
static inline u16 aty_ld_le16(int regindex, const struct atyfb_par *par)
{
/* Hack for bloc 1, should be cleanly optimized by compiler */
if (regindex >= 0x400)
regindex -= 0x800;
#if defined(__mc68000__)
return le16_to_cpu(*((volatile u16 *)(par->ati_regbase + regindex)));
#else
return readw(par->ati_regbase + regindex);
#endif
}
static inline void aty_st_le16(int regindex, u16 val,
const struct atyfb_par *par)
{
/* Hack for bloc 1, should be cleanly optimized by compiler */
if (regindex >= 0x400)
regindex -= 0x800;
#if defined(__mc68000__)
*((volatile u16 *)(par->ati_regbase + regindex)) = cpu_to_le16(val);
#else
writew(val, par->ati_regbase + regindex);
#endif
}
static inline u8 aty_ld_8(int regindex, const struct atyfb_par *par)
{
/* Hack for bloc 1, should be cleanly optimized by compiler */
......@@ -189,6 +221,19 @@ static inline u8 aty_ld_pll(int offset, const struct atyfb_par *par)
}
/*
* CT Family only.
*/
static inline void aty_st_pll(int offset, u8 val,
const struct atyfb_par *par)
{
/* write addr byte */
aty_st_8(CLOCK_CNTL + 1, (offset << 2) | PLL_WR_EN, par);
/* write the register value */
aty_st_8(CLOCK_CNTL + 2, val, par);
aty_st_8(CLOCK_CNTL + 1, (offset << 2) & ~PLL_WR_EN, par);
}
/*
* DAC operations
*/
......
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
......@@ -363,6 +363,31 @@ int num_registered_fb;
static int ofonly __initdata = 0;
#endif
/*
* we need to lock this section since fbcon_cursor
* may use fb_imageblit()
*/
u32 fb_get_buffer_offset(struct fb_info *info, u32 size)
{
u32 align = info->pixmap.buf_align - 1;
u32 offset;
spin_lock_irqsave(&info->pixmap.lock,
info->pixmap.lock_flags);
offset = info->pixmap.offset + align;
offset &= ~align;
if (offset + size > info->pixmap.size) {
if (info->fbops->fb_sync &&
info->pixmap.flags & FB_PIXMAP_SYNC)
info->fbops->fb_sync(info);
offset = 0;
}
info->pixmap.offset = offset + size;
spin_unlock_irqrestore(&info->pixmap.lock,
info->pixmap.lock_flags);
return offset;
}
#ifdef CONFIG_LOGO
#include <linux/linux_logo.h>
......@@ -1240,5 +1265,6 @@ EXPORT_SYMBOL(fb_show_logo);
EXPORT_SYMBOL(fb_set_var);
EXPORT_SYMBOL(fb_blank);
EXPORT_SYMBOL(fb_pan_display);
EXPORT_SYMBOL(fb_get_buffer_offset);
MODULE_LICENSE("GPL");
......@@ -17,30 +17,79 @@
#include <asm/uaccess.h>
#include <asm/io.h>
static inline void sysmove_buf(u8 *dst, u8 *src, u32 d_pitch, u32 s_pitch,
u32 height, struct fb_info *info)
{
int i, j;
for (i = height; i--; ) {
for (j = 0; j < s_pitch; j++)
dst[j] = *src++;
dst += d_pitch;
}
}
static inline void iomove_buf(u8 *dst, u8 *src, u32 d_pitch, u32 s_pitch,
u32 height, struct fb_info *info)
{
int i, j;
for (i = height; i--; ) {
for (j = 0; j < s_pitch; j++)
info->pixmap.outbuf(*src++, dst+j);
dst += d_pitch;
}
}
int soft_cursor(struct fb_info *info, struct fb_cursor *cursor)
{
int i, size = ((cursor->image.width + 7) / 8) * cursor->image.height;
static u8 src[64];
struct fb_image image;
static char data[64];
unsigned int i, size, s_pitch, d_pitch;
unsigned dsize = ((cursor->image.width + 7)/8) * cursor->image.height;
unsigned int scan_align = info->pixmap.scan_align - 1;
unsigned int buf_align = info->pixmap.buf_align - 1;
void (*move_data)(u8 *dst, u8 *src, u32 s_pitch,
u32 d_pitch, u32 height,
struct fb_info *info);
u8 *dst;
if (info->pixmap.outbuf != NULL)
move_data = iomove_buf;
else
move_data = sysmove_buf;
s_pitch = (cursor->image.width + 7)/8;
d_pitch = (s_pitch + scan_align) & ~scan_align;
size = d_pitch * cursor->image.height + buf_align;
size &= ~buf_align;
dst = info->pixmap.addr + fb_get_buffer_offset(info, size);
image.data = dst;
if (cursor->enable) {
switch (cursor->rop) {
case ROP_XOR:
for (i = 0; i < size; i++)
data[i] = (cursor->image.data[i] &
for (i = 0; i < dsize; i++) {
src[i] = (cursor->image.data[i] &
cursor->mask[i]) ^
cursor->dest[i];
cursor->dest[i];
}
break;
case ROP_COPY:
default:
for (i = 0; i < size; i++)
data[i] =
cursor->image.data[i] & cursor->mask[i];
for (i = 0; i < dsize; i++) {
src[i] = cursor->image.data[i] &
cursor->mask[i];
}
break;
}
} else
memcpy(data, cursor->dest, size);
move_data(dst, src, d_pitch, s_pitch, cursor->image.height,
info);
} else {
move_data(dst, cursor->dest, s_pitch, d_pitch,
cursor->image.height, info);
}
image.bg_color = cursor->image.bg_color;
image.fg_color = cursor->image.fg_color;
image.dx = cursor->image.dx;
......@@ -48,7 +97,6 @@ int soft_cursor(struct fb_info *info, struct fb_cursor *cursor)
image.width = cursor->image.width;
image.height = cursor->image.height;
image.depth = cursor->image.depth;
image.data = data;
if (info->fbops->fb_imageblit)
info->fbops->fb_imageblit(info, &image);
......
......@@ -325,6 +325,23 @@ struct fb_cursor {
struct fb_image image; /* Cursor image */
};
#define FB_PIXMAP_DEFAULT 1 /* used internally by fbcon */
#define FB_PIXMAP_SYSTEM 2 /* memory is in system RAM */
#define FB_PIXMAP_IO 4 /* memory is iomapped */
#define FB_PIXMAP_SYNC 256 /* set if GPU can DMA */
struct fb_pixmap {
__u8 *addr; /* pointer to memory */
__u32 size; /* size of buffer in bytes */
__u32 offset; /* current offset to buffer */
__u32 buf_align; /* byte alignment of each bitmap */
__u32 scan_align; /* alignment per scanline */
__u32 flags; /* see FB_PIXMAP_* */
void (*outbuf)(u8 dst, u8 *addr); /* access methods */
u8 (*inbuf) (u8 *addr);
unsigned long lock_flags; /* flags for locking */
spinlock_t lock; /* spinlock */
};
#ifdef __KERNEL__
#include <linux/fs.h>
......@@ -390,6 +407,7 @@ struct fb_info {
struct fb_monspecs monspecs; /* Current Monitor specs */
struct fb_cursor cursor; /* Current cursor */
struct fb_cmap cmap; /* Current cmap */
struct fb_pixmap pixmap; /* Current pixmap */
struct fb_ops *fbops;
char *screen_base; /* Virtual address */
struct vc_data *display_fg; /* Console visible on this display */
......@@ -464,6 +482,7 @@ extern int register_framebuffer(struct fb_info *fb_info);
extern int unregister_framebuffer(struct fb_info *fb_info);
extern int fb_prepare_logo(struct fb_info *fb_info);
extern int fb_show_logo(struct fb_info *fb_info);
extern u32 fb_get_buffer_offset(struct fb_info *info, u32 size);
extern struct fb_info *registered_fb[FB_MAX];
extern int num_registered_fb;
......
......@@ -849,7 +849,19 @@
#define LI_CHIP_ID 0x4c49 /* RAGE LT PRO */
#define LP_CHIP_ID 0x4c50 /* RAGE LT PRO */
#define LT_CHIP_ID 0x4c54 /* RAGE LT */
#define XL_CHIP_ID 0x4752 /* RAGE (XL) */
/* mach64CT family / (Rage XL) class */
#define GR_CHIP_ID 0x4752 /* RAGE XL, BGA, PCI33 */
#define GS_CHIP_ID 0x4753 /* RAGE XL, PQFP, PCI33 */
#define GM_CHIP_ID 0x474d /* RAGE XL, BGA, AGP 1x,2x */
#define GN_CHIP_ID 0x474e /* RAGE XL, PQFP,AGP 1x,2x */
#define GO_CHIP_ID 0x474f /* RAGE XL, BGA, PCI66 */
#define GL_CHIP_ID 0x474c /* RAGE XL, PQFP, PCI66 */
#define IS_XL(id) ((id)==GR_CHIP_ID || (id)==GS_CHIP_ID || \
(id)==GM_CHIP_ID || (id)==GN_CHIP_ID || \
(id)==GO_CHIP_ID || (id)==GL_CHIP_ID)
#define GT_CHIP_ID 0x4754 /* RAGE (GT) */
#define GU_CHIP_ID 0x4755 /* RAGE II/II+ (GTB) */
#define GV_CHIP_ID 0x4756 /* RAGE IIC, PCI */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment