Commit 3dad6909 authored by Melissa Wen's avatar Melissa Wen Committed by Alex Deucher

drm/amd/display: add plane CTM support

Map the plane CTM driver-specific property to DC plane, instead of DC
stream. The remaining steps to program DPP block are already implemented
on DC shared-code.

v3:
- fix comment about plane and CRTC CTMs priorities (Harry)
Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarMelissa Wen <mwen@igalia.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 34dc227b
......@@ -9983,6 +9983,7 @@ static bool should_reset_plane(struct drm_atomic_state *state,
if (dm_old_other_state->degamma_tf != dm_new_other_state->degamma_tf ||
dm_old_other_state->degamma_lut != dm_new_other_state->degamma_lut ||
dm_old_other_state->hdr_mult != dm_new_other_state->hdr_mult ||
dm_old_other_state->ctm != dm_new_other_state->ctm ||
dm_old_other_state->shaper_lut != dm_new_other_state->shaper_lut ||
dm_old_other_state->shaper_tf != dm_new_other_state->shaper_tf ||
dm_old_other_state->lut3d != dm_new_other_state->lut3d ||
......
......@@ -1172,6 +1172,8 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
struct dc_plane_state *dc_plane_state)
{
struct amdgpu_device *adev = drm_to_adev(crtc->base.state->dev);
struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state);
struct drm_color_ctm *ctm = NULL;
struct dc_color_caps *color_caps = NULL;
bool has_crtc_cm_degamma;
int ret;
......@@ -1224,5 +1226,29 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
return ret;
}
/* Setup CRTC CTM. */
if (dm_plane_state->ctm) {
ctm = (struct drm_color_ctm *)dm_plane_state->ctm->data;
/*
* DCN2 and older don't support both pre-blending and
* post-blending gamut remap. For this HW family, if we have
* the plane and CRTC CTMs simultaneously, CRTC CTM takes
* priority, and we discard plane CTM, as implemented in
* dcn10_program_gamut_remap(). However, DCN3+ has DPP
* (pre-blending) and MPC (post-blending) `gamut remap` blocks;
* therefore, we can program plane and CRTC CTMs together by
* mapping CRTC CTM to MPC and keeping plane CTM setup at DPP,
* as it's done by dcn30_program_gamut_remap().
*/
__drm_ctm_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix);
dc_plane_state->gamut_remap_matrix.enable_remap = true;
dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
} else {
/* Bypass CTM. */
dc_plane_state->gamut_remap_matrix.enable_remap = false;
dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
}
return amdgpu_dm_plane_set_color_properties(plane_state, dc_plane_state);
}
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